More particularly, the present invention relates to an AMLA board wherein a variety types of line interface blocks can be formed by using devices for UTOPIA Level 2 without necessitating an addition of separate logic, wherein data transfer to an upper block in the control station is available by using a switching chip, and wherein a variety of line interfaces can be accommodated by only one kind of AMLA PCB, thereby eliminating the need to manufacture several different kinds of PCBs.

BACKGROUND ART In general, the control station and the base station in a CDMA system inherently perform long distance connections therebetween. Physical transfer lines and formats of data transfer in those connections have been diversified due to increasing desires from the business groups.

The prior art PCBs cannot accommodate various and different line interfaces because of inherent limitations of interface by the switching chip connected to the back board. To allow known chips to accommodate the different line interfaces requires the use of a complex PLD (Programming Logic Device) in their interfacing.

In the method of using the PLD, data formats cannot be modified. Instead, only the interfacing of the chips arranged in front/rear thereof can be changed. In this process, if a delicate timing problem occurs, then it takes much time to solve the problem. Therefore, the implementation by the PLD has many limitations.

However, since converting data is impossible even in the method described above, new PCBs designed to cover the various services have been replaced for this purpose. Therefore, the implementation by the PLD becomes dependent upon the PCB. Accordingly, whenever new PCBs are used, the logic has to be redesigned.

For this reason, structural problems related to the interfacing between the control station and the base station have been raised.

According to the prior art, various long distance data transmission methods can exist between the base station and the control station in the CDMA system.

Hence, in order to cover various and different desires from the service provider, a plurality of line interfacing PCBs, which support several different data transmission methods, have to be manufactured.

Since the manufacture of many different PCBs involve extensive amount of time and manpower, it may hinder preoccupation of the market which can be done with a reduced price and time. It may further result in lowering of market competition.

DISCLOSURE OF THE INVENTION It is an objective of the present invention to provide an AMLA board wherein a variety types of line interface blocks can be formed by using devices for UTOPIA Level 2 without necessitating an addition of separate logic, wherein data transfer to an upper block in the control station is available by using a switching chip, and wherein a variety of line interfaces can be accommodated by only one kind of AMLA PCB. The AMLA board of the present invention can be designed to support various line interfaces that are determined according to data transmission method requested by business groups in transferring data between the CDMA control station and the base station.

In order to achieve the above objective, the present invention provides an AMLA board for interfacing between a control station and a base station in CDMA system, comprising: a processor section downloading both information required by the control station in its initial state and information required by the AMLA from an upper block, initializing the AMLA board with the downloaded information, checking out an abnormal state of devices in the AMLA board, processing various interrupts, and issuing failure signals to upper level PCBs through a communication path upon detecting an abnormal state of the AMLA board ; an EPLD section allowing a flexible connection between the processor section and the devices, informing the processor section of shelf information and information about the control station transferred from a back board, functioning to control a LED displaying a status of the AMLA board and to inform the processor section of version information of the PCB of the AMLA board; a switch interface section being set to a device master accompanied by a plurality of UTOPIA slaves and providing an address to select one of the plurality of slaves, enable signals needed for the UTOPIA communication and clock signals ; and a PHY interface section performing an interface between the control station and the base station in a high rate.

In order to achieve the objective described above, the processor section

comprises: a connector through which power source necessary for the processor is supplied to the AMLA board and the base station; two memory blocks (RAM, ROM) ; a LAN port performing a LAN interface; and a monitoring port (RS-232C port) through which debugging and monitoring functions are provided. Further, the processor section obtains the information needed for the control station in the initial state and the information needed for the AMLA by downloading those information from the upper block. It then initializes the AMLA board and the base station.

In order to achieve the objective described above, the switch interface section comprises: a 2 port optical interface forming two transmission lines having 155Mbps data rate by using a PM4359 so that it can be used for interfacing between the control station and the base station at a high rate; a trunk interface consisting of four 4 trunk chips for performing interfacing between the control station and the base station for 16 trunks (E1/T1) ; and an AAL 2/5 conversion block and an IMA function block for efficiently transferring data between the control station and the base station.

BRIEF DESCRIPTION OF DRAWINGS Fig. 1 is a block diagram showing a configuration of an inventive AMLA board; Fig. 2 is a block diagram showing a processor section in the inventive AMLA board ; Fig. 3 is a block diagram showing a switch interface section (cubit-622) of the present invention; Fig. 4 is a block diagram showing a method of data transfer between other board and a back board in the inventive AMLA board; and Fig. 5 is a block diagram illustrating the operation of a trunk interface section of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION Now, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First, the inventive AMLA (ATM Multi-phy Line Interface Assembly) board performs a data transfer from the CDMA control station to the base station in various manners.

Further, total of 4 AMLA boards can be mounted in the CDMA control station as an extension. The AMLA performs an E1/T1 trunk interface, a 16 HDLC PCM data interface at 2.048/1. 544Mbps, a AAL 2/5 ATM data format conversion and

two optical data interface at 155Mbps. In addition, it is provided with a EPLD block for the control of AMLA PCB and a processor block having an OS for an operation of the AMLA PCB.

Description of the present invention will be made with reference to the attached drawings.

Fig. 1 is a block diagram showing a configuration of the inventive AMLA.

As shown therein, the inventive AMLA includes (1) a processor section 100 which downloads both information required by the control station in its initial state and information required by the ALLA from an upper block, and which initializes the AMLA with the downloaded information and checks out an abnormal state of various devices, processing various interrupts, and which issues failure signals to upper level PCBs through a communication path upon detecting an abnormal state of the AMLA, (2) an EPLD section (Electric Programming Logic Device; 200) which allows the processor section 100 and other devices to be flexibly connected, and which informs the processor section 100 of shelf information and information about the control station transferred from a back board, and which functions to control a LED displaying a status of the AMLA and to inform the processor section 100 of version information of the PCB of the AMLA, (3) a switch interface section 300 set to a device master which is accompanied by a plurality of UTOPIA slaves and providing an address to select one of a plurality of slaves, enable signals needed for the UTOPIA communication and clock signals, and (4) a PHY interface section 400 performing an interface between the control station and the base station in a high rate.

The processor section 100 requires a processor for performing the initialization of the devices mounted in the AMLA and for running the OS. A processor module includes the processor section 100 of a daughter board type, which is configured with a XPC8260 processor commercially manufactured by MOTOROLA.

More detailed description of the processor section 100 will be made with reference to Fig. 2.

Fig. 2 is a block diagram illustrating the operation of the processor section in the inventive AMLA board.

As shown therein, the processor section 100 is configured in a form of module and is connected to the AMLA by using four 100 pin connectors.

Power source necessary for the processor is supplied from the AMLA through the connector and two memory blocks (RAM, ROM) are provided. Further, a LAN interface is formed with LAN ports. Debugging and monitoring functions

are available through a monitoring port (RS-232C port) in order to provide convenience to the developer.

Configuring the processor section 100 into the form of modules may reduce the time period for development on the processor section. It may also guarantee the reliability of the completed processor section since each of the modules has been verified from its application to other systems.

A system upgrade of the AMLA is available without changing the PCBs of the AMLA. It can be achieved by simply replacing the existing modules with modules having a higher performance.

The processor section obtains the information needed for the control station in the initial state and the information needed for the AMLA by downloading those information from the upper block. It then initializes the AMLA. The processor section transfers the information data to the base station that is needed for the initialization of the base station. The base station positions itself in a lower level of the initialization.

The processor section checks out an abnormal state of a plurality of devices, processes a plurality of interrupts and issues failure alarm signals to the upper level PCBs through the alarm communication path upon detecting the abnormal state of the AMLA.

The types of interfaces available in the processor section are as follows: - UTOPIA Level 2 interface - Peripheral device BUS interface - LAN, RS-232C interface Referring now to Fig. 1, the EPLD section (signal control section; 200) allows a flexible connection between the processor section 100 and other devices, informs the processor section 100 of the shelf information and the information about the control station transferred from the back board, controls the LED displaying the status of the AMLA and informs the processor section 100 of the version information of the PCB of the AMLA.

The EPLD section is capable of being reprogrammed tens of thousand times or more. In case that an operator who is far away from the AMLA wants the AMLA to reflect a modification, the reprogramming through the AMLA LAN interface can alleviate that situation.

Next, the switch interface section 300 may be explained by dividing it into a UTOPIA part and a CUBIT-622 part as follows.

First, with respect to the UTOPIA part (Universal Test & Operations PHY

Interface for ATM (Asynchronous Transfer Mode), a protocol defining methods in which upper level chips and line interface chips are connected to each other, when ATM data are transferred to lines of an upper level or lines of a lower level, in data transfer through line interface device mounted in a system using ATM), known PCBs are configured to comply with UTOPIA Level 1 (Unique Vs Unique). The inventive AMLA is designed to comply with UTOPIA Level 2 (Unique Vs Multi), thereby achieving a simplified structure.

The UTOPIA has a master and a plurality of slaves. The switch interface device is set to a master and the line interface devices are set to a plurality of slaves.

Meanwhile, since the AMLA has several interfacing types including processors (26Mbps, 155Mbps), 16 trunks (2.048 Mbps) and 16 HDLC, and CUBIT- 622 as the UTOPIA master has 622Mbps burst rate, it is contemplated herein that another PHY may be added.

Description thereof will be made with reference to Fig. 3.

Fig. 3 is a block diagram illustrating the operation of the CUBIT-622 in the switch interface section.

As shown therein, the CUBIT-622 (as the UTOPIA master) is accompanied by UTOPIA slaves.

The CUBIT-622 provides an address to select one of the slaves, enables signals necessary for the UTOPIA communication and clocks signals.

Since the CUBIT-622 can perform data transfer in a data rate higher than the AMLA structure, an increased number of PHYs can be added. Further, since additions of the logic for the UTOPIA communication are not required, the space in the PCB can be saved and the noise characteristics can be enhanced.

Meanwhile, the control station has been established to have one shelf.

More than ten PCBs can be mounted and all PCBs use 32 parallel data transmission and a cell type bused interface through the back board. The CUBIT-622 is used as the cell bus interfacing device in the AMLA. Other PCBs in the control station use UTOPIA Level 1 cell bus interface chip (CUBIT-PRO), whereas the AMLA uses UTOPIA Level 2 cell bus chip (CUBIT-622).

Interface between each of the PCBs of the control station and the back board via the cell bus will be described with reference to Fig. 4.

Fig. 4 is a block diagram showing data transfer of the AMLA to other boards and the back board.

Fig. 4 shows data transfer between the AMLA and other PCB boards and the back board in a cell bus type transmission method. For the cell bus type data

transfer, CUBIT device first has to be provided in all PCBs.

The CUBIT-PRO has an internal interfacing different from the CUBIT-622 which defines the relation between the UTOPIA and the PHY. However, when they are connected to each other through the cell bus type data transfer, they have a same external interface. When one of the PCB boards and the AMLA board is set to a master, the remaining boards become cell bus typed slaves and transmit data under permission by the master.

The PHY interface section 400 is provided with a 2 port optical interface 410, a trunk interface 4. 20, an AL 2/5 conversion block 430 and an IMA function block 440.

The 2 port optical interface 410 can form two transmission lines having 155Mbps data rate by using a PM4359. This is so that it can be used for the interfacing between the control station and the base station at a high rate.

The trunk interface 420 is the most frequently selected interface in connecting the control station and the base station with 16 trunks (E1/T1). Four 4 trunk chips (PM4354) are used as the line device and two services are available.

That is, the PM4354 can be used only at El (2.048Mbps) or Tl (1.544Mbps) without changing the transferred data.

Detailed description is made with reference to Fig. 5.

Fig. 5 is a block diagram illustrating the operation of the 16 trunk interface.

There are two paths (the first path and the second path), wherein a subsequent line interfacing is available only after going through the PM4354. The first and second paths have to be multiplexed/demultiplexed before the PM4354 block by using a buffer device.

The detailed description of a multi-functional communication module formed with processors will be made. Depending upon the requests by the business group, the first path or the second path is selected. The selected path is then properly set to comply with the requests.

Referring more particularly to Fig. 5, data are transferred to the upper blocks or the base station through the first and the second paths. Formats of data in the first path and the second path are different from each other while identical data rates are maintained due to the use ofthe PM4354.

After the manner of data transfer is determined between the base station and the control station under the consideration of the service type, the buffer existing prior to the PM4354 block in data transfer sequence is controlled in order to select one of the two paths. According to the selection, the function of the multi-

functional processor module is determined to have a source that supports the function of the selected path.

The function of the IMA for a conversion of the AAL 2/5 is achieved through the first path in Fig. 5.

The reason why the conversion of the AAL 2/5 (ATM Adaptation Layer2/Layer5) is required is to better efficiently transfer data between the control station and the base station under the ATM CDMA communication. Same reasoning can be applied to why the function of the IMA (Inverse Multiplexing for ATM) is required. Since understanding the implementation of the AAL 2/5 conversion function block 430 and the IMA block 440 does not require the knowledge directed to the ATM CDMA which has no relation to the structure of the present invention, the detailed description of the latter will be omitted.

The two functions described above are needed to provide a sufficient data transmission range in data transmission between the control station and the base station. This may be achieved via well implementation of compression algorithm or transmission algorithm even in a limited hardware link environment. These additional functions are needed to accommodate the requests from the business group and are accomplished by means of the processor module that are different from the processor module related to the operation of the board.

The ATM data, having been processed by the PM4354, the AAL 2/5 conversion block and the IMA block, are then transferred to the upper block of the system in the UTOPIA interface.

In addition to the functions described above, this module has a HDLC function block (High-level Data Link Control).

The HDLC function is achieved through the second path shown in Fig. 5.

The data are transmitted between the control station and the base station in a HDLC data format and data transmission rate is indicated with a trunk rate. Though this is somewhat an old-fashioned method for performing data transmission, it is certainly needed in the CDMA communication through the HDLC.

Because the processor module forming the IMA function block for the <BR> <BR> conversion of the AAL 2/5 can perform the HDLC function, the HDLC path (i. e. , the second path) can be formed by simply using another connector pin.

A brief explanation of the present invention described above is made as follows.

The inventive AMLA board can accommodate the 16 trunk links, two 155Mpbs links and the options of the service. Further, the board can provide a

simple data interface between the control station and the base station by using the trunk transition efficiently, thereby linking the control station and the base station.

The CUBIT-622 (functioning as the UTOPIA master chip) transmits data to the base station or to the upper block in the control station through the PHY layer device blocks (AAL 2/5 conversion block. Optical block, Processor block) and the ATM interface.

While the present invention has been shown and described with respect to particular embodiments of the AMLA board, it will be apparent to those skilled in the art that many changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims. Therefore, the spirit and scope of the present invention are not limited to the embodiment described above and they should be determined under the consideration of the appended claims and the equivalents thereof.

INDUSTRIAL APPLICABILITY In accordance with the inventive AMLA board, a variety types of line interface blocks can be formed by using devices for UTOPIA Level 2 without necessitating an addition of separate logic. Further, data transfer to an upper block in the control station is available by using a switching chip. Furthermore, a variety of line interfaces can be accommodated by only one kind of AMLA PCB. As a result, the AMLA board can support various line interfaces determined according to data transmission method requested by business groups in performing data transfer between the CDMA control station and the base station.

Further, since the present invention is designed to accommodate the UTOPIA Level 2 interface without an addition of PLD, it can provide the maximum thirty one PHY Layer interfaces. Therefore, the time period for its development and the costs associated therewith can be reduced. It further resolves the problem which occurs when adding the PLD (e. g. , timing delay).