Title:
AMPLIFIER CIRCUITS AND METHODS TO PROVIDE SMOOTH TRANSITION OF AMPLIFIER OUTPUTS DURING POWERING SEQUENCES
Document Type and Number:
WIPO Patent Application WO2002015388
Kind Code:
A3
Abstract:
The present invention is an apparatus and method to control an output from an amplifier circuit during a powering sequence. A current control circuit is coupled to the amplifier circuit to provide smooth transition at the output during the powering sequence, including the power-up interval and the power-down interval, during which the amplifier is muted. This results in the establishment and the decay of the amplifier mid-supply bias point during the power-up and power-down sequences, respectively, at rates that do not have significant frequency components in the audible range, eliminating the static-like click or pop on power-up and power-down, yet still providing short power-up and power-down times.
Inventors:
EDWARDS CHRISTOPHER F (US)
MANEY J WILLIAM JR (US)
MANEY J WILLIAM JR (US)
Application Number:
PCT/US2001/041681
Publication Date:
August 21, 2003
Filing Date:
August 10, 2001
Export Citation:
Assignee:
MAXIM INTEGRATED PRODUCTS (US)
EDWARDS CHRISTOPHER F (US)
MANEY J WILLIAM JR (US)
EDWARDS CHRISTOPHER F (US)
MANEY J WILLIAM JR (US)
International Classes:
H03F1/30; H03F3/72; H03G3/34; (IPC1-7): H03G3/34; H03F1/30
Foreign References:
US5648742A | 1997-07-15 | |||
US5515431A | 1996-05-07 | |||
US5307025A | 1994-04-26 | |||
EP0490295A1 | 1992-06-17 | |||
US4638507A | 1987-01-20 | |||
EP0570655A1 | 1993-11-24 | |||
EP0299665A2 | 1989-01-18 |
Other References:
PATENT ABSTRACTS OF JAPAN vol. 005, no. 125 (E - 069) 12 August 1981 (1981-08-12)
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