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Title:
ANALOG-DIGITAL CONVERTER
Document Type and Number:
WIPO Patent Application WO/2020/090434
Kind Code:
A1
Abstract:
In the present invention, a second comparison circuit 14 is a target time comparison circuit TDS[x] corresponding to a target approximate voltage range A[x] among 2K-number of time comparison circuits TDS[m], compares a comparison operation time difference TDD, included in a voltage comparison result regarding two adjacent approximate voltage ranges A[x+1], A[x-1] which are vertically adjacent to the target approximate voltage range A[x], with 2L-number of reference times TR corresponding to 2L-number of specific voltage ranges B, and generates, from the obtained time comparison result, an L-bit target binary code indicating a target specific voltage range B[x] including a held voltage VOTH, to reduce the number of comparators that operate upon analog-digital conversion.

Inventors:
YI YILMIN (JP)
MIURA NAOKI (JP)
FUKUYAMA HIROYUKI (JP)
NOSAKA HIDEYUKI (JP)
Application Number:
PCT/JP2019/040417
Publication Date:
May 07, 2020
Filing Date:
October 15, 2019
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE (JP)
International Classes:
H03M1/14; H03M1/36; H03M1/50
Foreign References:
JP2015005982A2015-01-08
JPH11163726A1999-06-18
Attorney, Agent or Firm:
YAMAKAWA, Shigeki et al. (JP)
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