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Patent Searching and Data


Title:
ANALOG SIGNAL OUTPUT APPARATUS
Document Type and Number:
WIPO Patent Application WO/2015/166542
Kind Code:
A1
Abstract:
The purpose of the present invention is to obtain a high-speed and low-power-consumption analog signal output apparatus without increasing cost and mounting area. An analog signal output apparatus (1) is provided with: two terminals (7a, 7b) that are connected to a load resistor (2); an analog signal output circuit (3); a DC-DC regulator (6); a voltage detection circuit (4) between the two terminals (7a, 7b); and a control circuit (5), which has inputted thereto a detection voltage value (Vr) of the voltage detection circuit (4), and which controls the analog signal output circuit (3) and the DC-DC regulator (6). The control circuit (5) is provided with: a current value setting section (51) that sets a current value to be outputted from the analog signal output circuit (3); a voltage value monitoring section (52) that holds the detection voltage value (Vr); and a load resistance value calculating section (53) that calculates, on the basis of the current value set as the detection voltage value (Vr), a load resistance value (RL), i.e., a resistance value of the load resistor (2). A drive power supply voltage value of the analog signal output circuit (3) is calculated by adding a set voltage margin value to the product of the load resistance value (RL) and a setting upper limit value of an output current of the analog signal output circuit (3).

Inventors:
AOKI SATOSHI (JP)
AKEBOSHI YOSHIHIRO (JP)
Application Number:
PCT/JP2014/061913
Publication Date:
November 05, 2015
Filing Date:
April 28, 2014
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
G05F1/575
Domestic Patent References:
WO2009125491A12009-10-15
Foreign References:
JP2010119041A2010-05-27
JP2004109444A2004-04-08
JP2013162585A2013-08-19
JPH09182426A1997-07-11
JPH0530993U1993-04-23
Attorney, Agent or Firm:
SAKAI, HIROAKI (JP)
Hiroaki Sakai (JP)
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