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Title:
ANALOG-TO-DIGITAL CONVERTER AND CLOCK GENERATION CIRCUIT THEREOF
Document Type and Number:
WIPO Patent Application WO/2020/140782
Kind Code:
A1
Abstract:
An analog-to-digital converter and a clock generation circuit thereof. The clock generation circuit comprises cascaded clock generation modules (100); each stage of the clock generation module (100) is configured to generate a corresponding internal clock signal; each stage of the clock generation module (100) comprises a delay module (110) and a logic gate module (120); the second input end of the N-th stage of the logic gate module (120) is connected to the output end of the previous stage of the logic gate module (120), and the output end of the logic gate module (120) is configured to output an internal clock, so that each stage of the clock generation module (100) can generate one internal clock signal; and the internal clock N can be computed according to the internal clock N-1 and a delay time of the delay module (110) in the present stage of the clock generation module (100), and 2-N internal clock signals can be generated by using one external clock signal. A user can select one clock for an analog-to-digital converter according to requirements. The principle is simple, the circuit structure is simple to implement, the system power consumption is reduced, and the application to the analog-to-digital converter does not affect the analog-to-digital converter.

Inventors:
LI CHEN (CN)
WANG HAO (CN)
Application Number:
PCT/CN2019/127385
Publication Date:
July 09, 2020
Filing Date:
December 23, 2019
Export Citation:
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Assignee:
CSMC TECHNOLOGIES FAB2 CO LTD (CN)
International Classes:
H03M1/38
Foreign References:
CN101562440A2009-10-21
CN103684465A2014-03-26
CN103986461A2014-08-13
CN102427368A2012-04-25
US20100090876A12010-04-15
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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