Title:
ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING ARRAY SUBSTRATE
Document Type and Number:
WIPO Patent Application WO/2018/120087
Kind Code:
A1
Abstract:
An array substrate, comprising a substrate (10), a TFT switch (12) formed on the substrate (10), a protective layer (13) covering the substrate (10) and the TFT switch (12) and a pixel electrode (14) being formed on the protective layer (13), the TFT switch (12) comprising a gate insulating layer (121), a channel region (122) located on the gate insulating layer (121) and a source (123) and a drain (125) connected to the channel region (122); the pixel electrode (14) is connected to the source (123) or drain (125) via a through hole (15), the through hole (15) being located on one side of the channel region (122) and the through hole (15) passing through the protective layer (13) and the source (123) or drain (125); also provided is a method for manufacturing the array substrate.
Inventors:
YE JIANGBO (CN)
Application Number:
PCT/CN2016/113657
Publication Date:
July 05, 2018
Filing Date:
December 30, 2016
Export Citation:
Assignee:
SHENZHEN ROYOLE TECHNOLOGIES CO LTD (CN)
International Classes:
H01L29/786
Foreign References:
CN101276840A | 2008-10-01 | |||
US20060054889A1 | 2006-03-16 | |||
JP2003152188A | 2003-05-23 |
Attorney, Agent or Firm:
SCIHEAD IP LAW FIRM (CN)
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