Title:
AVALANCHE PHOTODIODE AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2020/129648
Kind Code:
A1
Abstract:
Provided are a substrate (101), an n-type contact layer (102), a buffer layer (103), a multiplication layer (105), an electric field control layer (106), an absorbing layer (107), and a p-type contact layer (108). The buffer layer (103) comprises an electrically conductive layer (104) formed in the central portion thereof. The substrate (101) comprises a semiconductor such as SiC having a higher thermal conductivity than InP. The n-type contact layer (102) comprises the same semiconductor as the semiconductor of the substrate (101) and is formed to be n-type.
Inventors:
YAMADA YUKI (JP)
NAKAJIMA FUMITO (JP)
NAKAJIMA FUMITO (JP)
Application Number:
PCT/JP2019/047440
Publication Date:
June 25, 2020
Filing Date:
December 04, 2019
Export Citation:
Assignee:
NIPPON TELEGRAPH & TELEPHONE (JP)
International Classes:
H01L31/107
Domestic Patent References:
| WO2018189898A1 | 2018-10-18 |
Foreign References:
| JP2014032994A | 2014-02-20 | |||
| JP2017228569A | 2017-12-28 | |||
| US20180254356A1 | 2018-09-06 |
Other References:
PAUCHARD, A. ET AL.: "Wafer-bonded InGaAs/Silicon Avalanche Photodiodes", PROCEEDINGS OF SPIE, vol. 4650, 2002, pages 37 - 43, XP055721492
MCDONALD, P. ET AL.: "1 mm APDs in InGaAs with InAlAs and InP multiplicatioi layers: performance characteristics", PROC. OF SPIE, vol. 6206, 2006, pages 620606-1 - 620606-7
LIU, H. ET AL.: "4H-SiC PIN Recessed-Window Avalanche Photodiode With High Quantum Efficiency", IEEE PHOTONICS TECHNOLOGY LETTERS, vol. 20, 2008, pages 1551 - 1553, XP011233323, DOI: 10.1109/LPT.2008.928823
HIROTA, Y. ET AL.: "Reliable non-Zn-diffused InP/InGaAs avalanche photodiodE with buried n-InP layer operated by electron injection mode", ELECTRONICS LETTERS, vol. 40, 2004, pages 1378 - 1379, XP006022776, DOI: 10.1049/el:20046652
SHIRATORI, Y. ET AL.: "High-Speed InP/InGaAsSb DHBT on High-Thermal- Conductivity SiC Substrate", IEEE ELECTRON DEVICE LETTERS, vol. 39, June 2018 (2018-06-01), pages 807 - 810, XP011683953, DOI: 10.1109/LED.2018.2829531
MCDONALD, P. ET AL.: "1 mm APDs in InGaAs with InAlAs and InP multiplicatioi layers: performance characteristics", PROC. OF SPIE, vol. 6206, 2006, pages 620606-1 - 620606-7
LIU, H. ET AL.: "4H-SiC PIN Recessed-Window Avalanche Photodiode With High Quantum Efficiency", IEEE PHOTONICS TECHNOLOGY LETTERS, vol. 20, 2008, pages 1551 - 1553, XP011233323, DOI: 10.1109/LPT.2008.928823
HIROTA, Y. ET AL.: "Reliable non-Zn-diffused InP/InGaAs avalanche photodiodE with buried n-InP layer operated by electron injection mode", ELECTRONICS LETTERS, vol. 40, 2004, pages 1378 - 1379, XP006022776, DOI: 10.1049/el:20046652
SHIRATORI, Y. ET AL.: "High-Speed InP/InGaAsSb DHBT on High-Thermal- Conductivity SiC Substrate", IEEE ELECTRON DEVICE LETTERS, vol. 39, June 2018 (2018-06-01), pages 807 - 810, XP011683953, DOI: 10.1109/LED.2018.2829531
Attorney, Agent or Firm:
YAMAKAWA, Shigeki et al. (JP)
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