An energy converter of this type is known per se from, inter alia, US 5, 075, 599 and US 5, 696, 431. In this converter, the load is often a rectifier and the energy source is a DC voltage source. Together with the load, the energy converter has for its object to convert a DC input voltage of the energy source into a DC output voltage of the load.

However, the load may also comprise a different device than the rectifier, which device is fed with an alternating voltage. The energy converter may thus consist, inter alia, of a DC/DC converter and a DC/AC converter.

For a satisfactory operation of the energy converter, it is important that the switches for generating the alternating current are switched on and off at the right instant.

The frequency at which the switches are switched on and off defines the mode of operation of the converter. If the frequency is sufficiently high, the energy converter operates in a regular inductive mode. In this mode, the phase of the current through the primary side of the transformer trails the phase of the voltage at the node. After a current-conducting switch is opened, and after the diode of the other switch has started to conduct the current, the other switch can be opened. In that case, there are no switching losses. The time interval in which both switches are opened is referred to as the non-overlap time.

The converter operates in the near-capacitive mode when the switching frequency of the switches, and hence the frequency of the alternating current through the primary side of the transformer is decreased to a point where the alternating current is at least almost in phase with the alternating current at the node. After the current conducting switch is opened and before the diode, which is arranged anti-parallel to the other switch, starts to conduct, the direction of the current through the primary side of the transformer is reversed.

Hard-switching takes place if the other switch is closed in that case. This means that switching takes place at an instant when there is a voltage difference across the relevant switch. This will result in switching losses.

The converter operates in the capacitive mode when the frequency at which the switches are switched is further decreased to a point where the alternating current through the primary side of the transformer is in phase with, or even leads the phase of the voltage at the node. The switching losses also occur in this mode.

Generally, it is desirable that the energy converter operates in the inductive mode. To this end, it is important that the non-overlap time is chosen to be sufficiently long to prevent hard-switching, i. e. switching losses. However, the non-overlap time is bound to a maximum because hard-switching also occurs in the case of a too long overlap time so that switching losses occur.

To determine the overlap time for an energy converter operating in the inductive mode, it is known to provide the control device with means for comparing the value of a quantity which relates or is equal to the value of a change of the voltage per unit of time at a node of the first and the second switch, on the one hand, with a threshold value, on the other hand, for determining the switching instants of the first and the second switch. More particularly, the instant when the other switch must be closed, is determined by measuring the current flowing through a capacitance of the energy converter, which capacitance is incorporated in the energy converter in such a way that it reduces the value of the change of the voltage at the node per unit of time. The other switch is closed at the instant when the value of this current decreases and becomes equal to a relatively small positive threshold value. In accordance with a practical elaboration, the switching instant is determined by comparing the voltage across the current-sense resistor with a reference voltage by means of a comparator. This sense resistor may be arranged in series with said capacitance, or it may be incorporated in the alternating current path via a capacitive current divider. A drawback of the known energy converter is that the comparator, which is operative on the basis of relatively small input signals and relatively small slopes, can react in a delayed manner. As a

result, the relevant switches may be switched on too late. This in turn may mean that hard- switching as yet occurs in the inductive mode, resulting in switching losses.

It is an object of the invention to provide a solution to the above-mentioned problem. It is also an object of the invention to provide an energy converter which, when operative in the near-capacitive mode, can reduce the switching losses to a minimum.

According to the invention, the energy converter is characterized in that the control device is adapted to determine a reached maximum value of said quantity and to determine the threshold value on the basis of the determined maximum value of the quantity.

Since the threshold voltage is determined on the basis of a determined maximum value of said quantity, it is possible to compensate for said delay and for a comparator possibly used in the control device.

The threshold value can be particularly chosen on the basis of the maximum value in such a way that, when the energy converter operates in the near-capacitive mode, the relevant switch is closed when the alternating voltage at the node has reached an extreme value. This extreme value results in the switching losses being minimized. The reason is that the voltage difference across the switch which is closed at that instant is minimal.

Particularly, the threshold voltage is equal to a factor K times the maximum value, in which K has a value of between 0 and 1. This factor K may be particularly chosen to be such that the switching losses are minimal in the near-capacitive mode. In the inductive mode, it then holds that the overlap time has such a non-critical value that there will be no switching losses at all.

It is therefore preferable that the factor K is determined in such a way that one of the switching instants coincides with the instant when the voltage at the node assumes an extreme value when the frequency of the alternating current through the primary side of the transformer is so low that this alternating current is at least substantially in phase with the voltage at the node. The factor K is thus determined in such a way that the switching losses are minimal in the near-capacitive mode.

The energy converter preferably also comprises at least a capacitance for limiting the value of a change of the voltage at the node per unit of time, the value of said quantity relating to the value of the current through the capacitance. If this capacitance is not present, the voltage at the node per unit of time will have a very large change and will be dependent on parasitic capacitances. If the semiconductor switches do not have large parasitic capacitances, it is therefore advantageous to include the capacitance for limiting the

value of the change of the voltage at the node per unit of time. This will often be the case in practice.

In the latter case, it particularly holds that the factor K is determined in such a way that one of the switching instants coincides with the instant when the current through the capacitance becomes zero, while the value of the current preceding said instant decreases to zero when the frequency of the alternating current through the primary side of the transformer is so low that this alternating current is at least substantially in phase with the voltage at the node. The control device may then comprise a current peak detector which is connected via a first measuring capacitance to the node for determining said maximum value.

In accordance with a further elaboration of this variant, the control device further comprises a multiplier which is connected to an output of the peak detector for multiplying the maximum value by the factor K, a second measuring capacitance and a comparator which is connected to an output of the multiplier and is connected to the node via the second measuring capacitance, the comparator being adapted to determine the instant when an output signal of the peak detector is equal to an output signal of the comparator.

Generally, the first and the second capacitance are formed by at least one and the same capacitance in this case.

These and other aspects are apparent from and will be elucidated with reference to the embodiments described hereinafter.

In the drawings : Fig. 1 shows a possible embodiment of an energy converter ; Fig. 2 is a circuit diagram of the energy converter shown in Fig. 1, in which components located on a secondary side of the transformer of the energy converter are transformed to a primary side of the transformer ; Fig. 3a shows various voltages and currents of the energy converter according to Fig. 1, when this converter is active in the inductive mode ; Fig. 3b shows various voltages and currents of the energy converter shown in Fig. 1, when this converter is operative in the near-capacitive mode ; Fig. 3c shows various voltages and currents of the energy converter shown in Fig. 1, when this converter is operative in the capacitive mode ; Fig. 4bl shows a known method of determining a non-overlap time ;

Fig. 4b2 shows a known method in accordance with Fig. 4bl which nevertheless leads to hard-switching ; Fig. 5 shows a possible embodiment of a part of the control device of an energy converter according to the invention ; Fig. 6a shows a voltage and current diagram to illustrate the operation of the control device of Fig. 5 in the inductive mode ; and Fig. 6b shows voltages and currents in accordance with Fig. 6a for illustrating the control device of Fig. 5 when the energy converter is active in the near-capacitive mode.

The reference numeral 1 in Fig. 1 denotes a possible embodiment of an energy converter. This energy converter may be in the form of an energy converter in accordance with the state of the art and as an energy converter according to the invention. The energy converter as active in accordance with the state of the art will be discussed first.

In this embodiment, the energy converter 1 is formed as a resonant half-bridge converter. The energy converter 1 is adapted to supply electric energy to a load Zload'from an energy source Vs, a DC energy source in this embodiment. In this embodiment, the energy source Vs generates a DC voltage Vo. The energy converter comprises a transformer T having a primary side Tp and a secondary side Tc. Moreover, the energy converter comprises a first controllable semiconductor switch Sh and a second controllable semiconductor switch S1 which are arranged in series with each other. The first switch Sh and the second switch SI are interconnected at a node K. The first and second semiconductor switches Sh and Sl may be, for example, a transistor, a thyristor, a MOSFET, etc. The first switch Sh is arranged anti- parallel to a body diode dl. The second switch Sl is arranged anti-parallel to a body diode d2.

The node K is connected via a coil LI to the primary side Tp of the transformer T. The energy converter further comprises a capacitance C1, with the coil LI, the primary side Tp and the capacitance C1 being arranged in series with one another. In this embodiment, the capacitance Cl is arranged between the primary side Tp of the transformer T and ground. In this embodiment, one side of the power supply source Vs is also connected to ground.

However, it is alternatively possible to connect the capacitance C1 to the side of the power supply source Vs which is not connected to ground.

The energy converter further comprises a capacitance C2'which is arranged parallel to the load Zload'on the secondary side of the transformer 2. The load Zload'may be a device which operates at an alternating voltage. This device may in turn be, for example, a rectifier for obtaining a DC voltage.

The energy converter further comprises a capacitance Chb which is arranged in such a way that it smoothes the value of a change of the voltage at the node K per unit of time. In this embodiment, the capacitance Chb is arranged between the node K and ground.

However, the capacitance Chb may be alternatively arranged between the node K and the side of the power supply source Cs which is not connected to ground. Alternatively, the capacitance Chb may in principle consist of a parasitic capacitance of elements of the energy converter.

The energy converter is further provided with a control device Cnt for controlling the first and the second switch Sh, SI via leads 12 and 13, respectively. The control device Cnt thus defines the instants when the first and second switches Sh and S1 are opened and closed. In this embodiment, an input of the control device is connected to the node K via a lead 11.

When the capacitance C2'and the load Zload'are transformed in known manner to the primary side of the transformer T, an equivalent circuit diagram of the energy converter of Fig. 1 is obtained, as is shown in Fig. 2. The coil L2 replaces the transformer T, the capacitance C2 replaces the capacitance C2', and Zload replaces the load Zload'.

Fig. 2 shows some currents and voltages which will be elucidated hereinafter.

The voltage Vhb at the node K is a square wave during normal use. For computing the transfer characteristics, a first harmonic approximation may be used, in which only the fundamental frequency is considered. The higher harmonics can be ignored because the frequencies of these components are far apart from the resonance frequency of the energy converter. Moreover, it holds that the contribution of these higher harmonics to the output (Zload) is negligible.

If the capacitor Cl has a sufficient value, it may also be ignored. If Zload has an infinitely large impedance, it holds for the resonance frequency : In this case, Lp is a parallel arrangement of the coils LI and L2 : L1. L2 L1 + L2

In practice, Zload will, however, be a finite impedance, which results in a shift of the resonance frequency.

Fig. 3a shows the waveforms when the energy converter operates in the inductive mode. Here, Hs gate is the switching signal which is applied to the first switch Sh.

When this switching signal is high, the switch Sh is closed, i. e. conducting. The signal Hs gate is applied by the control device Cnt to this switch. The signal Ls gate is the control signal which is applied by the control device Cnt to the second switch SI. It appears therefrom that both switches will never be closed simultaneously. If this were the case, there would be a short circuit. The significance of the other signals is directly apparent from Fig.

3a. In the inductive mode, the phase of the current lid trails the (fundamental harmonic of the) voltage Vhb of the half-bridge circuit, i. e. the voltage at the node K in this embodiment.

The fundamental harmonic of the voltage Vhb is denoted by a broken line in the Iind diagram. After the conducting switch (for example, the first switch Sh) is opened at the instant tO, the current Iind will charge the capacitor Chb. After subsequently the body diode (d2) of the other switch (this is the switch which has not just been opened) starts conducting, this other switch Sl can be closed at the instant tl. Then there is no noticeable voltage across this switch. In that case, there are no switching losses. The interval tO-tl in which both switches are opened is referred to in this case as the non-overlap time. This phenomenon is repeated with inverted voltages and currents when the switch S1 is opened at instant t2 and the switch Sh is closed at instant t3, while the body diode dl conducts current. The non- overlap time is the interval t2-t3.

Fig. 3a shows by means of Hs/Ls Fet and Ls diode that, if Iind is larger than 0, the current Iind flows through the switch Sh, the switch SI or the diode d2 arranged anti- parallel to the switch SI. Similarly, Hs/Ls Fet and Hs diode indicate that, when the current Iind is smaller than 0, this current flows through the switch Sh, the switch S1 or the diode dl arranged anti-parallel to the switch Sh.

Fig. 3b shows the diagrams of Fig. 3a when the switching frequency of the energy converter is decreased to a point at which the current Iind is almost in phase with the (fundamental harmonic of) the voltage Vhb, but is still inductive. After the conducting switch Sh or Sl is opened, the current Iind will start charging the capacitance Chb, but before the diode (dl or d2) of the other switch starts conducting, the direction of the current Iind is reversed. At the instant when the direction of the current Iind is reversed, the slope of Vhb is equal to 0. As is clearly apparent from Fig. 3b, the voltage Vhb at the node K is smaller at the

instant tl than the power supply voltage Vs applied to the switch Sh. In other words, there is a voltage across the switch Sh. When the switch Sh is subsequently closed at the instant tl (Hs gate becomes high), hard-switching takes place at which switching losses occur. The voltage across the switch Sh disappears within a fraction of a second, and the voltage at the node K and the voltage Vhb jump to the value of the power supply voltage of the power supply Vs. This results in a short lasting current peak of Ichb after the instant tl, as is shown in Fig. 3b. This phenomenon is repeated when the switch Sh is opened at the instant t2 and when subsequently the switch S1 is closed at the instant t3 after the non-overlap time t3-t2 has elapsed. Hard-switching also takes place when the switch Sl is closed. The mode described with Fig. 3b is referred to as the near-capacitive mode.

In the diagrams shown in Fig. 3c, the frequency of the energy converter is decreased to a point at which the current Iind is in phase with the (fundamental harmonic of) the half-bridge voltage Vhb or even leads the half-bridge voltage in phase. In that case, the capacitor Chb is not charged at all. This is apparent from Fig. 3c in which the voltage Vhb remains equal to 0 between the instants tO and tl. When the switch Sh is therefore closed at the instant tl, there is a voltage difference across this switch which is equal to the power supply voltage Vo. When the switch Sh is closed, hard-switching thus again takes place and switching losses occur.

The desired mode in which the energy converter is active is the mode in accordance with Fig. 3a, in which the current find is inductive and switching losses are minimal. For a satisfactory operation, the non-overlap time (tO-tl and t2-t3) must be chosen to be sufficiently long to prevent hard-switching as a result of the finite rise time and decay time of the voltage Vhb. In fact, as is shown in Fig. 3a, the voltage Vhb rapidly increases between tO and tl but in this case it takes approximately (tl-tl)/2 sec before Vhb has reached its maximum value. On the other hand, there is also a maximum to which the non-overlap time is bound because the other switch Sl must be closed before the current Iind reverses its direction again. If this is not the case, hard-switching also takes place.

In existing systems, there are two ways of determining the overlap time. First, use is made of a fixed non-overlap time. This is a simple method in which the opposite switch is closed after a fixed delay time has elapsed and after the conducting switch was opened. However, it is also known to implement the non-overlap time in an adjustable way.

The instant of switching of the switch SI is determined by the instant when the current through the capacitance Chb passes a small positive value when the value of the current decreases towards 0. This positive value Idet is shown in Fig. 4bl. In Fig. 4bl, the energy

converter operates in the inductive mode, i. e. the mode in accordance with Fig. 3a. At the instant tO, the switch Sl is opened in this embodiment. The switch Sh had already been opened. At tO, the voltage Vhb starts to increase. The current Ichb starts to decrease towards 0, also from the instant tO. When the current Ichb becomes equal to Idet at the instant t4, the instant is determined which in its turn triggers the instant when the non-overlap time can end, i. e. when the switch Sh can be closed. (At a negative slope of Vhb, all polarities are reversed and the instant when the switch Sl can be closed is determined in the same way.) A comparator is often used for determining the instant when Ichb is equal to Idet. However, this comparator has a reaction time resulting in said other switch Sh being closed some time after the instant t4, in this example at the instant tl. However, the delay may be so large that the current direction of Ichb has meanwhile been reversed. This means that the voltage Vhb already starts to decrease so that a substantial voltage is present across the switch Sh when this switch is closed. Then, hard-switching takes place again. This is shown in Fig. 4b2.

According to the invention, this problem is alleviated by adapting the control device Cnt to determine a reached maximum value of a given quantity, in this example the current Ichb, in which subsequently a threshold value is determined on the basis of this determined maximum value. Particularly, the threshold value in this embodiment is chosen to be equal to the factor K times the maximum value Ichb, in which K has a value between 0 and 1. The control device is then provided with means for comparing a value of a quantity which relates or is equal to the change of the voltage per unit of time at the node K, on the one hand, (in this example the current Ichb, or dVhb/dt) with the threshold value, on the other hand, for determining the switching instants. In this embodiment, at least the switching instants when the switches Sh and SI are closed are thus determined. The instant when the switches are opened may be determined in known manner.

To this end, the control device is provided with a peak current detector PI which is connected to the node K via a capacitance Cs. The output of the peak detector PI is connected to a comparator Compl via two series-arranged multipliers MI and M2.

Moreover, the comparator Compl is connected to the node K via a multiplier M3 and via the capacitance Cs. The output of the comparator Compl is connected to a processor P2, which processor P2 is connected to the switch Sh via the lead 12 and to the switch Sl via the lead 13.

It holds that the current Ics is equal to Cs x dVhb/dt.

Furthermore, it can easily be ascertained that, during the period when Vhb changes (the periods between tO and t4 and t2 and t5), it holds that

Ics = Iind x Cs + Chb The contrl device Cnt operates as follows.

The peak detector P1 determines the maximum value of the current Ics. The maximum value of the current Ics is also a measure of the maximum value of the current Iind. This maximum value is also a measure of the maximum slope of Vhb (Vhb/dt max).

This means that it is a measure of a quantity which relates to a maximum value of the change of the voltage per unit of time at the node K between the first and the second switch. The quantity which relates to the value of the change of the voltage Vhb per unit of time is thus the current Ics in this embodiment. The peak detector determines the maximum value of this current Ics. This value Ics max is multiplied by the multiplier MI by a value K, in which K may assume a value of between 0 and 1. The multiplier M2 multiplies the output signal of the multiplier MI by a factor C. In this example, this factor C is chosen to be 1. The value K x Ics max functions as a threshold value in this example. The multiplier M3 multiplies the value of Ics also by a factor C. In this example, the factor C is chosen to be equal to 1, as stated hereinbefore, so that the comparator 1 compares the value of Ics with the threshold value mentioned hereinbefore.

In the inductive mode, the current Iind will not become equal to 0 in the time interval in which Vhb changes, i. e. in the time interval t0-t4 and in the time interval t2-t5. At the end of the slope dVhb/dt, for example, at the instant t4 (until the instant t0), the current Ics will decrease to 0 (and this also applies to the current Ichb) and Iind will subsequently flow through the diode dl, with the result that dVhb/dt becomes equal to 0. This is shown in Fig. 6a. At the instant t6 when Ics decreases to 0 and passes the threshold value K x Ics max, the comparator Compl will control the processor P2 in response thereto. In response thereto, the processor P2 will close the switch Sh via lead 12. This takes place at the instant tl which is delayed some time with respect to the instant t6. This delay time AT = t6-tl is not critical as long as the current Iind is not yet equal to 0. Since a delay time AT is now necessary, it is no longer a drawback that the comparator Compl itself also causes a delay time AT. This delay time may be incorporated in the delay time AT. According to the invention, it is therefore ensured that the instant t6 occurs before the instant t4 when the slope of Vhb becomes equal to 0. In how far the instant t6 occurs at an earlier instant than the instant t4 can be determined by adjusting the factor K. If the factor K becomes smaller, t6 will occur at a

later instant (and hence also tl), and if K becomes larger, t6 will occur at an earlier instant (and hence also tl) if it is assumed that AT is chosen to be a fixed value. In accordance with a practical variant, the delay of the comparator Compl itself is taken as a value for AT. The processor P2 then does not have any influence on AT. The processor P2 may of course also be adapted in such a way that AT is the sum of the inherent delay AT of the comparator Compl plus an adjusted delay of the processor P2.

When the energy converter operates in the near-capacitive mode, the control device shown in Fig. 5 has another great advantage. This will be described with reference to Fig. 6b. In the near-capacitive mode, the current Iind will decrease during the period t0-t4 in which Vhb has a slope. The instant t6 when Ics has become equal to the threshold value K x Ics max is before the instant t4. This instant t6 is determined by the factor K. If K becomes larger, t6 will occur at an earlier instant. When K decreases, t6 will occur at a later instant.

The factor K can now be chosen to be such that the switching instant tl (for which it holds that tl = t6+AT) coincides with the instant t4. In other words, the factor K can be chosen to be such that tl = t4. This means that, in this example, the switch Sh is closed at the instant when the voltage Vhb is maximal. This means that the switch Sh is closed at the instant when the voltage across this switch is minimal. In other words, the switch Sh is closed at the instant when the current Ics is equal to 0. The switching losses will thereby be minimized. It is ensured in a completely analog way that the switch SI is closed at an instant t3 for which the voltage Vhb again reaches an extreme value. At this instant, it therefore holds again that the current Ics and Iind is equal to 0 and that a minimal voltage is present across the switch Sl because the voltage at the node K has reached an extreme value which is as close as possible to the voltage supplied by the voltage source Vs to the switch Sl (in this example, this voltage level is equal to ground). All voltages, currents and threshold values are inverted with respect to the situation discussed hereinbefore for determining the instant when the switch Sh is closed. The instants when the switches Sh and SI are opened are determined in known manner by the processor P2.

The invention is by no means limited to the embodiments described hereinbefore. For example, factor C may assume values different from 1. Particularly, the factor C is chosen to be equal to 1/K. In that case, the maximum value of Ics is taken as the threshold value and this threshold value is compared with a quantity which corresponds to Ics/K. The invention is described with reference to a half bridge. The switching instants may, however, be determined in an entirely analog way for a full-bridge circuit having four switches. In that case, the switches are arranged pair-wise equal. It is also feasible in this case that the peak detector PI and the multiplier M3 are connected to the node K, each with a separate capacitor Cs and Cs', respectively. Such variants are considered to be within the scope of the invention.