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Patent Searching and Data


Title:
BINARY ADDER
Document Type and Number:
WIPO Patent Application WO1999031562
Kind Code:
A3
Abstract:
The present invention relates to apparatus for determining the sum of first and second optical binary words. The apparatus uses a first optical logic gate (35) and a second optical logic gate (17) to generate respective first and second combination words which represent a logical combination of the binary words applied to the respective logic gates (17, 35). The first and second combination words are then offset by one bit slot with respect to each other by an offsetting means (22, 32) to generate first and second offset combination words. These offset combination words are repeatedly fed back to the first and second logic gates. The binary sum of the original two words is given by the first combination word when each bit slot of the second combination word has the same logical state.

Inventors:
POUSTIE ALISTAIR JAMES (GB)
BLOW KEITH JAMES (GB)
MANNING ROBERT JOHN (GB)
Application Number:
PCT/GB1998/003655
Publication Date:
July 29, 1999
Filing Date:
December 08, 1998
Export Citation:
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Assignee:
BRITISH TELECOMM (GB)
POUSTIE ALISTAIR JAMES (GB)
BLOW KEITH JAMES (GB)
MANNING ROBERT JOHN (GB)
International Classes:
G06E1/04; G06F7/50; G06F7/505; (IPC1-7): G06E1/04; G06F7/50
Foreign References:
GB2201534A1988-09-01
Other References:
"BINARY AND BINARY CODED DECIMAL ADDERS AND SUBTRACTORS", TTL, MOS, LINEAR, OPTO APPLICATIONS REPORTS, PAGE(S) 65 - 70, TEXAS INSTRUMENTS, XP002061631
CUYKENDALL R ET AL: "CONTROL-SPECIFIC OPTICAL FREDKIN CIRCUITS", APPLIED OPTICS, vol. 26, no. 10, 15 May 1987 (1987-05-15), pages 1959 - 1963, XP002061630
HEURING V P ET AL: "BIT-SERIAL ARCHITECTURE FOR OPTICAL COMPUTING", APPLIED OPTICS, vol. 31, no. 17, 10 June 1992 (1992-06-10), pages 3213 - 3224, XP000269546
PATENT ABSTRACTS OF JAPAN vol. 010, no. 334 (P - 515) 13 November 1986 (1986-11-13)
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