Title:
BLOCK INTERLEAVE DEVICE, BLOCK DEINTERLEAVE DEVICE, BLOCK INTERLEAVE METHOD, AND BLOCK DEINTERLEAVE METHOD
Document Type and Number:
WIPO Patent Application WO/2000/055975
Kind Code:
A1
Abstract:
A block interleave device, a block deinterleave device, a block interleave method and a block deinterleave method, in which block interleave and block deinterleave are affected on a surface of a memory unit having a block of memory locations, wherein in order to reduce circuit area and power consumption, a comparative reference value for a comparator (123) in an address producer (103) for producing addresses for a memory unit (104) is set at a minimum value larger than L x M - 1, which appears in the output from a multiplier (111), thereby reducing the size of the comparator.
Inventors:
FURUTANI SENICHI (JP)
Application Number:
PCT/JP2000/001543
Publication Date:
September 21, 2000
Filing Date:
March 14, 2000
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD (JP)
FURUTANI SENICHI (JP)
FURUTANI SENICHI (JP)
International Classes:
G11B20/18; H03M13/27; (IPC1-7): H03M13/27
Domestic Patent References:
| WO1995016311A1 | 1995-06-15 |
Foreign References:
| EP0715432A2 | 1996-06-05 |
Other References:
See also references of EP 1170871A4
Attorney, Agent or Firm:
Hayase, Kenichi (Esaka ANA Building 17-1, Enoki-cho Suita-shi Osaka, JP)
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