Title:
BUFFER DEVICE, BUFFER ARRANGEMENT METHOD, AND INFORMATION PROCESSING DEVICE
Document Type and Number:
WIPO Patent Application WO/2007/096984
Kind Code:
A1
Abstract:
Provided is a buffer device shared by a CPU core arranged with inversion about
a predetermined reference line. Even-number line buffer groups are divided
into two even-number sub groups and each of the even-number sub groups is arranged
at a symmetrical position about the reference line. Odd-number line buffer groups
are divided into two odd-number sub groups and each of the odd-number sub groups
is arranged at a symmetric position about the reference line. Wiring switching
units are provided on the wiring connecting respective ports of the CPU core to
the line buffers so that the wiring switching units are switched according to
a write destination address contained in transfer data.
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Inventors:
YOSHIZAWA SHUICHI (JP)
Application Number:
PCT/JP2006/303443
Publication Date:
August 30, 2007
Filing Date:
February 24, 2006
Export Citation:
Assignee:
FUJITSU LTD (JP)
YOSHIZAWA SHUICHI (JP)
YOSHIZAWA SHUICHI (JP)
International Classes:
G06F12/08; H01L21/82; H01L21/822; H01L27/04
Foreign References:
| JP2001051957A | 2001-02-23 |
Attorney, Agent or Firm:
SAKAI, Hiroaki (Kasumigaseki Building 2-5, Kasumigaseki 3-chom, Chiyoda-ku Tokyo 19, JP)
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