CHIP ASSEMBLY, MANUFACTURING METHOD THEREFOR, CHIP AND ELECTRONIC DEVICE

WIPO Patent Application WO/2023/221540

A1

Provided in the present application are a chip assembly, a manufacturing method therefor, a chip and an electronic device. The chip assembly may include a processing chip and a first chip. The processing chip comprises a power supply connecting line and a grounding connecting line. The first chip comprises: at least one decoupling capacitor; the decoupling capacitor comprises: a first pole and a second pole; the first pole of the decoupling capacitor is directly connected to the power supply connecting line of the processing chip; and the second pole thereof is directly connected to the grounding connecting line of the processing chip. In the embodiments of the present application, the capacitive resources in the first chip can provide decoupling capacitor resources for the processing chip, so that the area of the processing chip can be saved, the processing chip can achieve more data processing functions, and the function of the chip assembly is richer. Moreover, the function of the first chip in the chip assembly is relatively single, so that the decoupling capacitor is arranged in the first chip, and the function of the chip assembly is not influenced.

JPS6159780	SEMICONDUCTOR DEVICE
JPS58165368	MANUFACTURE OF SEMICONDUCTOR DEVICE
WO/2018/139556	SEMICONDUCTOR DEVICE

YIN SHIHUI (CN)
WANG ZHENGBO (CN)
JING WEILIANG (CN)
HUANG KAILIANG (CN)
LIAO HENG (CN)

PCT/CN2023/071806

November 23, 2023

January 11, 2023

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HUAWEI TECH CO LTD (CN)

H01L27/06

US20100164084A1	2010-07-01
CN104576583A	2015-04-29
CN108022916A	2018-05-11
CN102893397A	2013-01-23
CN212461689U	2021-02-02

TDIP & PARTNERS (CN)

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