CHIP TEST ASSEMBLY, CHIP TEST SYSTEM AND CHIP TEST METHOD

WIPO Patent Application WO/2022/143037

A1

A chip test assembly, a chip test system and chip test method. The chip test assembly comprises a test sub-board (10) and a performance test mainboard (20); the test sub-board (10) comprises a chip loading region (12) and a test connection region (13), the chip loading region (12) is used for loading a chip to be tested, and a mainboard connector is provided on the test connection region (13); the performance test mainboard (20) comprises a mainboard substrate (21), and a sub-board connector (22) and a signal transmission port provided on the mainboard substrate (21), and the signal transmission port is electrically connected to the sub-board connector (22) by means of a signal connection line (25); and when the sub-board connector (22) on the performance test mainboard (20) is attached to the mainboard connector on the test connection region (13) in the test sub-board (10), the signal transmission port is electrically connected to the chip on the test sub-board (10). The chip test assembly is helpful to ensure test accuracy and reduce test costs.

LIN KAIHUI (CN)
NI JIANXING (CN)

PCT/CN2021/136082

July 07, 2022

December 07, 2021

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RADROCK SHENZHEN TECH CO LTD (CN)

G01R31/28

CN112834909A	2021-05-25
CN104865412A	2015-08-26
CN207366693U	2018-05-15
CN109765481A	2019-05-17
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CN208568976U	2019-03-01
CN101109784A	2008-01-23
CN211206712U	2020-08-07
CN109061236A	2018-12-21

SHENZHEN ZHONGDINGHUICHENG INTELLCCTUAL PROPERTY AGENCY (CN)

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