Title:
CHOPPER AMPLIFIER, ACTIVE FILTER, AND REFERENCE FREQUENCY GENERATING CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2012/053133
Kind Code:
A1
Abstract:
In first operation mode, an input switching unit (101) supplies input voltages (Vin1, Vin2) to input nodes (Nin1, Nin2), respectively, a connection switching unit (104) connects a common node (Nc) to an intermediate node (N1), and an output switching unit (105) supplies intermediate voltages (V1, V2) to an intermediate node (N105) and an output node (Nout), respectively. In second operation mode, the input switching unit (101) supplies the input voltages (Vin1, Vin2) to the input nodes (Nin2, Nin1), respectively, and the connection switching unit (104) connects the common node (Nc) to the intermediate node (N1), and the output switching unit (105) supplies the intermediate voltages (V1, V2) to the output node (Nout) and the intermediate node (N105), respectively. A voltage control unit (106) controls a control voltage (Vcnt) such that the voltage applied to the intermediate node (N105) is close to the voltage applied to the output node (Nout).
Inventors:
TOKUNAGA YUSUKE
Application Number:
PCT/JP2011/003475
Publication Date:
April 26, 2012
Filing Date:
June 17, 2011
Export Citation:
Assignee:
PANASONIC CORP (JP)
TOKUNAGA YUSUKE
TOKUNAGA YUSUKE
International Classes:
H03F3/45; H03F3/34; H03F3/38; H03H11/04; H03H11/12
Domestic Patent References:
| WO2009035665A1 | 2009-03-19 |
Foreign References:
| JP2007074670A | 2007-03-22 | |||
| JP2003218698A | 2003-07-31 | |||
| JP2008067050A | 2008-03-21 | |||
| JP2002530916A | 2002-09-17 |
Attorney, Agent or Firm:
MAEDA, Hiroshi et al. (JP)
Hiroshi Maeda (JP)
Hiroshi Maeda (JP)
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Claims: