Title:
CIRCUIT BOARD AND METHOD FOR PRODUCING CIRCUIT BOARD
Document Type and Number:
WIPO Patent Application WO/2023/171351
Kind Code:
A1
Abstract:
According to the present invention, an interlayer connection conductor is provided within a through hole that penetrates a first insulator layer and a second insulator layer in the Z-axis direction. A first conductor layer is positioned on a negative main surface of an insulator layer that is positioned on the more negative side of the Z-axis than the second insulator layer, while being in contact with an end of the interlayer connection conductor in the negative direction of the Z-axis. A second conductor is positioned on a positive main surface of the second insulator layer, while being in contact with an end of the interlayer connection conductor in the positive direction of the Z-axis. The surface roughness of a portion of the inner circumferential surface of the through hole, the portion being positioned on the second insulator layer, is higher than the surface roughness of a portion of the inner circumferential surface of the through hole, the portion being positioned on the first insulator layer. A conductor layer, which is in contact with the interlayer connection conductor, is not provided between the first insulator layer and the second insulator layer.
Inventors:
NISHIO KOSUKE (JP)
SHIMAMURA TAKAYUKI (JP)
SHIMAMURA TAKAYUKI (JP)
Application Number:
PCT/JP2023/006094
Publication Date:
September 14, 2023
Filing Date:
February 20, 2023
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H05K3/40; H05K1/03; H05K1/11; H05K3/46
Domestic Patent References:
| WO2020071473A1 | 2020-04-09 | |||
| WO2017179542A1 | 2017-10-19 | |||
| WO2018163999A1 | 2018-09-13 |
Foreign References:
| JP2020013976A | 2020-01-23 | |||
| JP2005021917A | 2005-01-27 |
Attorney, Agent or Firm:
KAEDE PATENT ATTORNEYS' OFFICE (JP)
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