Title:
COPPER VIAS IN LOW-K TECHNOLOGY
Document Type and Number:
WIPO Patent Application WO2002056342
Kind Code:
A3
Abstract:
In integrated circuits having copper interconnect and low-k interlayer dielectrics, a problem of open circuits after heat treatment was discovered and solved by the use of a first liner layer (42) of Ti, followed by a conformal liner layer (46) of CVD TiN, followed in turn by a final liner layer (48) of TA or TaN, thus improving adhesion between the via and the underlying copper layer while reducing the increase in resistance caused by alloying between the Ti and the copper to an acceptable amount.
Inventors:
BOETTCHER STEVEN H
HO HERBERT L
HOINKIS MARK
LEE HYUN KOO
WANG YUN-YU
WONG KWONG HON
HO HERBERT L
HOINKIS MARK
LEE HYUN KOO
WANG YUN-YU
WONG KWONG HON
Application Number:
PCT/US2001/049138
Publication Date:
January 08, 2004
Filing Date:
December 19, 2001
Export Citation:
Assignee:
IBM (US)
INFINEON TECHNOLOGIES CORP (US)
INFINEON TECHNOLOGIES CORP (US)
International Classes:
H01L21/3205; H01L21/768; C23C16/34; H01L23/52; H01L23/532; (IPC1-7): H01L21/44; H01L21/4763
Foreign References:
| US6080669A | 2000-06-27 | |||
| US6303490B1 | 2001-10-16 | |||
| US20010033025A1 | 2001-10-25 |
Other References:
See also references of EP 1397830A4
Download PDF: