Title:
DIGITAL SIGNAL PROCESSOR ARCHITECTURE OPTIMIZED FOR CONTROLLING SWITCHED MODE POWER SUPPLY
Document Type and Number:
WIPO Patent Application WO2004073149
Kind Code:
A3
Abstract:
A switched mode power supply comprises a first switch coupled to an input power source, a second switch coupled to ground, and an output filter coupled to a phase node defined between the first and second switches. The first and second switches are responsive to a pulse width modulated signal to thereby regulate power provided to the output filter. A controller is provided in a feedback loop that monitors operation of the first and second switches and delays activation of one of the first and second switches to preclude simultaneous conduction. The controller comprises at least one delay control circuit adapted to delay delivery of the pulse width modulated signal to at least one of the first and second switches. The delay control circuit detects a phase difference between state transitions of the first and second switches and provides a delay corresponding to a magnitude of the phase difference.
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Inventors:
CHAPUIS ALAIN (US)
Application Number:
PCT/US2004/003174
Publication Date:
February 24, 2005
Filing Date:
February 04, 2004
Export Citation:
Assignee:
POWER ONE LTD (US)
CHAPUIS ALAIN (US)
CHAPUIS ALAIN (US)
International Classes:
H02M3/157; (IPC1-7): G05F1/40
Foreign References:
| US6194883B1 | 2001-02-27 | |||
| US5349523A | 1994-09-20 |
Other References:
See also references of EP 1593014A4
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