Title:
DUAL GATE THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2017/061669
Kind Code:
A1
Abstract:
Disclosed is a dual gate thin film transistor. A dual gate thin film transistor according to an embodiment of the present invention comprises: a substrate; a first gate electrode disposed on the substrate; an oxide semiconductor layer disposed on the first gate electrode; a source electrode and a drain electrode disposed on the oxide semiconductor layer; and a second gate electrode disposed on the oxide semiconductor layer. The first and second gate electrodes comprise an offset area between the source electrode and the drain electrode, with reference to the vertical axis of the dual gate thin film transistor, and an oxide semiconductor layer corresponding to the offset area is plasma-treated with a halogen-based gas.
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Inventors:
JANG JIN (KR)
UM JAE GWANG (KR)
KIM YONG HWAN (KR)
UM JAE GWANG (KR)
KIM YONG HWAN (KR)
Application Number:
PCT/KR2016/000178
Publication Date:
April 13, 2017
Filing Date:
January 08, 2016
Export Citation:
Assignee:
UNIV-INDUSTRY COOP GROUP OF KYUNG HEE UNIV (KR)
International Classes:
H01L29/786
Foreign References:
| KR20140078190A | 2014-06-25 | |||
| KR20120056767A | 2012-06-04 | |||
| JPH0897433A | 1996-04-12 | |||
| US20020034842A1 | 2002-03-21 | |||
| JP2005072144A | 2005-03-17 |
Attorney, Agent or Firm:
KIM, Youn Gwon (KR)
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