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Title:
ENHANCING PHOTORESIST PERFORMANCE USING ELECTRIC FIELDS
Document Type and Number:
WIPO Patent Application WO2005038527
Kind Code:
A3
Abstract:
Electric fields may be advantageously used in various steps of photolithographic processes. For example, prior to the pre-exposure bake, photoresists that have been spun-on the wafer may be exposed to an electric field to orient aggregates or other components within the unexposed photoresist. By aligning these aggregates or other components with the electric field, line edge roughness may be reduced, for example in connection with 193 nanometer photoresist. Likewise, during exposure, electric fields may be applied through uniquely situated electrodes or using a radio frequency coil. In addition, electric fields may be applied at virtually any point in the photolithography process by depositing a conductive electrode, which is subsequently removed during development. Finally, electric fields may be applied during the developing process to improve line edge roughness.

Inventors:
BRISTOL ROBERT (US)
CAO HEIDI (US)
CHANDHOK MANISH (US)
MEAGLEY ROBERT (US)
RAMACHANDRARAO VIJAYAKUMAR (US)
Application Number:
PCT/US2004/032256
Publication Date:
January 12, 2006
Filing Date:
September 30, 2004
Export Citation:
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Assignee:
INTEL CORP (US)
BRISTOL ROBERT (US)
CAO HEIDI (US)
CHANDHOK MANISH (US)
MEAGLEY ROBERT (US)
RAMACHANDRARAO VIJAYAKUMAR (US)
International Classes:
G03F1/14; G03F7/09; G03F7/11; G03F7/16; G03F7/20; G03F7/30; G03F7/38; (IPC1-7): G03F7/16
Foreign References:
JPH10106930A1998-04-24
US20030008246A12003-01-09
US5648000A1997-07-15
JPS5732632A1982-02-22
JPS63244622A1988-10-12
JPS6371842A1988-04-01
US20020046703A12002-04-25
US6103145A2000-08-15
US5783362A1998-07-21
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