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Title:
ERROR CORRECTION CODING ARRANGEMENT
Document Type and Number:
WIPO Patent Application WO/2018/210624
Kind Code:
A1
Abstract:
Various communication systems may benefit from the correction of errors. For example, an error correction coding arrangement may benefit certain wireless communication systems, for example when applied to physical broadcast channel in fifth generation new radio. A method can include preparing information bits to be transmitted. The method can also include dividing a set of parity bits corresponding to the information bits according to a number of transmissions of the information bits. The method can further include transmitting the information bits with a first subset of the parity bits as a message.

Inventors:
VIHRIÄLÄ JAAKKO EINO ILMARI (FI)
JAYASINGHE KEETH SALIYA (LK)
Application Number:
PCT/EP2018/061819
Publication Date:
November 22, 2018
Filing Date:
May 08, 2018
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NOKIA TECHNOLOGIES OY (FI)
International Classes:
H04L1/00; H04L1/08; H04L1/18
Foreign References:
US20090037797A12009-02-05
Other References:
HUAWEI ET AL: "Soft-combining for PBCH", vol. RAN WG1, no. Hangzhou, China; 20170515 - 20170519, 14 May 2017 (2017-05-14), XP051273354, Retrieved from the Internet [retrieved on 20170514]
NOKIA ET AL: "Remaining details of PBCH", vol. RAN WG1, no. Prague, Czech Republic; 20171009 - 20171013, 2 October 2017 (2017-10-02), XP051352562, Retrieved from the Internet [retrieved on 20171002]
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Claims:
WE CLAIM:

1. A method, comprising:

preparing information bits to be transmitted;

dividing a set of parity bits corresponding to the information bits according to a number of transmissions of the information bits; and

transmitting the information bits with a first subset of the parity bits as a message.

2. The method of claim 1 , further comprising:

transmitting the information bits again a predetermined plurality of times with a respective subset of the parity bits.

3. The method of claim 1 or claim 2, wherein the number of transmissions of the information bits and number of subsets of the parity bits are equal; the method further comprising implicitly indicating timing related information using the message.

4. The method of claim 2 or claim 3, wherein each of the transmissions of the predetermined plurality of times contains a same number of parity bits.

5. The method of any of claims 1 -4, wherein the first subset of the parity bits are provided as least significant bits of the message.

6. The method of any of claims 1 -5, wherein the message is self-decodable.

7. The method of any of claims 1 -6, wherein the number of transmissions of the information bits is 2b where b is the number of bits which indicates timing information.

8. The method of any of claims 1 -7, wherein the number of transmissions of the information bits is four transmissions.

9. The method of any of claims 1 -8, wherein a cyclic shift is applied to the information bits after the first transmission.

10. A method, comprising:

receiving information bits with a first subset of parity bits, wherein the first subset of the parity bits is divided from a set of parity based on a number of transmissions of the information bits; and

blind decoding the information bits.

11. The method of claim 10, further comprising:

receiving the information bits again a predetermined plurality of times with a respective subset of the parity bits.

12. The method of 11 , wherein each of the transmissions received the predetermined plurality of times contains a same number of parity bits.

13. The method of any of claims 10-12, wherein the parity bits are provided as least significant bits of the message.

14. The method of any of claims 10-13, wherein the message is self-decodable.

15. The method of any of claims 10-14, wherein the number of transmissions of the information bits is 2b where b is the number of bits which indicates timing information.

16. The method of any of claims 10-15, wherein the number of transmissions of the information bits is four transmissions.

17. The method of any of claims 10-16, wherein cyclic shift is applied to the information bits after the first transmission.

18. An apparatus, comprising:

means for performing a process, the process comprising the method according to any of claims 1 -17.

19. An apparatus, comprising:

at least one processor; and

at least one memory including computer program code,

wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to perform a process, the process comprising the method according to any of claims 1 -17.

20. A computer program product encoded with instructions for performing a process, the process comprising the method according to any of claims 1 -17.

21 . A non-transitory computer readable medium encoded with instructions that, when executed in hardware, perform a process, the process comprising the method according to any of claims 1 -17.

Description:
DESCRIPTION

TITLE:

Error Correction Coding Arrangement CROSS-REFERENCE TO RELATED APPLICATION:

[0001 ] This application is related to and claims the benefit and priority of U.S. Provisional Patent Application No. 62/506,839, filed May 16, 2017, the entirety of which is hereby incorporated herein by reference.

BACKGROUND:

Field:

[0002] Various communication systems may benefit from the correction of errors. For example, an error correction coding arrangement may benefit certain wireless communication systems, for example when applied to physical broadcast channel in fifth generation new radio.

Description of the Related Art:

[0003] Fifth generation (5G) new radio (NR) physical broadcast channel (PBCH) may have a maximum of 64 synchronization signal (SS) blocks above 52.6 GHz. Even though such a requirement is valid above 52.6 GHz, coding scheme used for PBCH may not change depending on the operating frequency.

[0004] The considered maximum number of SS-blocks, L, within an SS burst set for different frequency ranges are as follows: for the frequency range up to 3 GHz, the maximum number of SS-blocks, L, within SS burst set is [1 , 2, 4]; for the frequency range from 3GHz to 6 GHz, the maximum number of SS-blocks, L, within SS burst set is [4, 8]; and for the frequency range from 6 GHz to 52.6 GHz, the maximum number of SS-blocks, L, within SS burst set is [64]. The aforementioned values are to be used to facilitate the NR initial access design and evaluate the specification impact.

[0005] Combining of NR-PBCH may improve performance of the PBCH transmission. Different options for combining NR-PBCH may include combining across an SS burst set, within an SS burst set, or within a subset of an SS burst set, for example within an SS burst, within a number of slot(s), or the like.

[0006] In long term evolution (LTE), rate 1 /3 tail-biting convolutional code (TBCC) is used. Repetition is then used to get rate 1/12. The resulting data is sent 4 times, and as a consequence, the effective coding rate is 1/48. There are 40 information bits including CRC. Among these 40 bits are 8 bits for system frame number.

[0007] These 4 transmissions are sent 10 ms apart, and the cell edge user may use soft combining over the 4 transmissions. Each transmission is self-decodable, so a user with high signal to noise ratio (SNR) can decode when just one transmission is received.

[0008] The LTE approach provides a small number of information bits. In 5G, it is expected that the number of information bits may be between 40 and 100. Moreover, repetition is not an effective way to decrease coding rate. Designing a code with lower rate natively would bring gain.

SUMMARY:

[0009] According to a first embodiment, a method can include preparing information bits to be transmitted. The method can also include dividing a set of parity bits corresponding to the information bits according to a number of transmissions of the information bits. The method can further include transmitting the information bits with a first subset of the parity bits as a message.

[0010] In a variant, the method can further include transmitting the information bits again a predetermined plurality of times with a respective subset of the parity bits.

[0011] In a variant, each of the transmissions can contain a same number of parity bits.

[0012] In a variant, the parity bits can be provided as least significant bits of the message.

[0013] In a variant, the message can be self-decodable.

[0014] In a variant, the number of transmissions of the information bits can be 2 b where b is the number of implicitly indicated timing bits.

[0015] In a variant, the number of transmissions of the information bits is four transmissions.

[0016] In a variant, a cyclic shift can be applied to the information bits after the first transmission.

[0017] According to a second embodiment, a method include receiving information bits with a first subset of parity bits. The first subset of the parity bits can be divided from a set of parity based on a number of transmissions of the information bits. The method can also include blind decoding the information bits.

[0018] In a variant, the method can further include receiving the information bits again a predetermined plurality of times with a respective subset of the parity bits.

[0019] In a variant, each of the transmissions can contain a same number of parity bits.

[0020] In a variant, the parity bits can be provided as least significant bits of the message.

[0021] In a variant, the message can be self-decodable.

[0022] In a variant, the number of transmissions of the information bits can be 2 b where b is the number of implicitly indicated timing bits.

[0023] In a variant, the number of transmissions of the information bits is four transmissions.

[0024] In a variant, a cyclic shift can be applied to the information bits after the first transmission.

[0025] According to third and fourth embodiments, an apparatus can include means for performing the method according to the first and second embodiments respectively, in any of their variants.

[0026] According to fifth and sixth embodiments, an apparatus can include at least one processor and at least one memory including computer program code. The at least one memory and the computer program code can be configured to, with the at least one processor, cause the apparatus at least to perform the method according to the first and second embodiments respectively, in any of their variants.

[0027] According to seventh and eighth embodiments, a computer program product may encode instructions for performing a process including the method according to the first and second embodiments respectively, in any of their variants.

[0028] According to ninth and tenth embodiments, a non-transitory computer readable medium may encode instructions that, when executed in hardware, perform a process including the method according to the first and second embodiments respectively, in any of their variants.

[0029] According to eleventh and twelfth embodiments, a system may include at least one apparatus according to the third or fifth embodiments in communication with at least one apparatus according to the fourth or sixth embodiments, respectively in any of their variants.

BRIEF DESCRIPTION OF THE DRAWINGS:

[0030] For proper understanding of the invention, reference should be made to the accompanying drawings, wherein:

[0031] Figure 1 illustrates transmitted bits, according to certain embodiments.

[0032] Figure 2 illustrates blind decoding when one transmission has been received, according to certain embodiments.

[0033] Figure 3 illustrates blind decoding when two transmissions have been received, according to certain embodiments.

[0034] Figure 4 illustrates blind decoding when three transmissions have been received, according to certain embodiments.

[0035] Figure 5 illustrates blind decoding when four transmissions have been received, according to certain embodiments.

[0036] Figure 6 illustrates a sixty-four synchronization signal burst, according to certain embodiments.

[0037] Figure 7 illustrates a method according to certain embodiments.

[0038] Figure 8 illustrates a system according to certain embodiments.

DETAILED DESCRIPTION:

[0039] In LTE, TBCC is used for PBCH, and soft combining and implicit SS block indication is possible as TBCC. However, poor performance of the LTE-TBCC code compared to low density parity check (LDPC) code and polar code prevented TBCC from being the enhanced mobile broadband (eMBB) data or control channel coding scheme. LDPC and Polar codes may serve as candidates for the PBCH channel.

[0040] More particularly, the primary candidates for PBCH channel coding include the following: a polar control channel coding scheme with Nmax <= 512, reusing the same decoder; or an LDPC data channel coding scheme, reusing the same decoder, namely with no new shift network, but a new base graph may be considered. However, implicit timing indication and supporting soft combining are not conventionally addressed for either LDPC or polar codes.

[0041] As mentioned above, a maximum burst set may be 64 bits. As the maximum burst set is equal to 64, 6 bits may be required to inform the SS block index. When the SS block index is indicated explicitly, the soft combining becomes a problem for the underlying coding scheme. If the PBCH can explicitly carry part of SS block index, at least some performance gain can also be expected with the soft combining.

[0042] Certain embodiments are applicable to a code with a very small native code rate, such as 1/48. In 5G, the number of frame number bits may be 6. Therefore, a number of least significant bits (LSBs), for example 2 bits, may not be in the payload, but may instead be encoded in the set of parity bits sent.

[0043] Figure 1 illustrates transmitted bits, according to certain embodiments. As shown in Figure 1 , the parity bits can be divided into 4 parts: p1 , p2, p3, and p4, and information bits are denoted in this example with u. In the n th transmission, parity part n can be transmitted with the information bits u.

[0044] Figure 2 illustrates blind decoding when one transmission has been received, according to certain embodiments. As shown in Figure 2, each transmission can be self- decodable. The UE may not know which one of the transmissions of Figure 1 was sent, and therefore the UE can perform blind decoding. In Figure 2, "u_rx1 " denotes the received systematic part, and "P_rx1 " denotes the received parity part.

[0045] If signal to noise ratio (SNR) is high enough, one of these decodings may be successful, and physical broadcast channel (PBCH) information bits can be detected with small latency. On the other hand, if cyclic redundancy check (CRC) is not successful, the UE can wait until the next transmission.

[0046] Figure 3 illustrates blind decoding when two transmissions have been received, according to certain embodiments. Now the UE may be unable to know if these two transmissions are from the same code block, so the blind decodings shown in Figure 3 may be used. Assuming the two transmissions are from two different transmissions, soft combining of the two received systematic blocks is impossible, and in this case u_rx1 is not needed. Assuming they are from the same transmission, soft combining can be used for the systematic parts, and the two parity parts, P_rx1 and P_rx2 have 3 different possible locations. Note that some unnecessary combining cases are not needed, and are crossed over in the figure. The way in which the receiver handles decoding may be implementation dependent.

[0047] Figure 4 illustrates blind decoding when three transmissions have been received, according to certain embodiments. Similar to Figure 3, some unnecessary combining cases are not needed, and are crossed over in the figure.

[0048] Figure 5 illustrates blind decoding when four transmissions have been received, according to certain embodiments. Similar to Figures 3 and 4, some unnecessary combining cases are not needed, and are crossed over in the figure.

[0049] The above examples can be combined with other modifications. For example, four transmissions were shown in the last example, but any number of bits can be encoded in the transmissions. If the number of bits to be implicitly indicated is b, then there can be 2^ transmissions (compare Figure 1 ), during which u may remain the same.

[0050] Another modification is that in certain embodiments, cyclic shift can be applied to systematic part u. Low-density parity-check (LDPC) code may have a slight advantage due to syndrome check, which may lead to smaller number of CRC bits, but any systematic code can be used.

[0051] In the description above, it was mentioned that "u" denotes systematic bits. However, for some codes, this may not be optimal. Therefore, in a general case, bit reorganization can occur after encoding. This reorganization can arrange bits so that the output fields of "u" and "P_rx" fields are the outputs. For example, with certain LDPC codes with high weight for some columns in the parity check matrix, it may be beneficial not to repeat these bits. For polar codes, similar structure can be designed, since inherently some bits may be better protected than others. Details can be variously implemented.

[0052] Furthermore, the bits in "P_rx1 " can include those bits which have the best performance. Typically these bits with the best performance may be bits which would not be punctured first. The bits which are least important in decoding can be put to the last transmission. As a result, the probability of early decoding success may be maximized.

[0053] Figure 6 illustrates a sixty-four synchronization signal burst, according to certain embodiments. As new radio (NR) PBCH may require 64 different SS block transmissions at higher carrier frequencies, LDPC coding scheme and other techniques to indicate the SS timing index can be combined to support 64 SS burst transmissions.

[0054] For example, Figure 6 shows all possible SS blocks, grouped into 16 sets, where each set can contain the coding combination according to certain embodiments. In particular, the first set and second set can be similar in terms of coding configuration, but they can be different in terms of demodulation reference signal (DMRS) patterns or any other techniques. Also, these combinations may divided and focused on most significant and least significant parts of the timing index that the base station (BS) may need to transmit.

[0055] Figure 7 illustrates a method according to certain embodiments. As shown in Figure 7, a method can include, at 710, preparing information bits to be transmitted. The method can also include, at 720, dividing a set of parity bits corresponding to the information bits according to a number of transmissions of the information bits.

[0056] In a variant, the parity bits can be provided as least significant bits of the message. Other options are also possible. For example, the parity bits can be provided as the most significant bits of the message. The number of parity bits can be half the number of transmissions of the information bits. More generally, the number of transmissions of the information bits can be 2 b where b is the number of implicitly indicated timing bits. The method can further include, at 730, transmitting the information bits with a first subset of the parity bits as a message. The message can be self-decodable.

[0057] The method can also include, at 735, receiving the information bits with a first subset of parity bits. The first subset of the parity bits can be divided from a set of parity based on a number of transmissions of the information bits. The method can also include, at 737, blind decoding the information bits. The parity bits can also be blind decoded together with the information bits.

[0058] The method can further include, at 740, transmitting the information bits again a predetermined plurality of times with a respective subset of the parity bits. A cyclic shift can be applied to the information bits after the first transmission. Each of the transmissions can contain a same number of parity bits. Alternatively, different transmissions can contain different numbers of parity bits. The number of transmissions of the information bits can be, for example, four transmissions. Other numbers of transmissions are also permitted.

[0059] Correspondingly, the method can additionally include, at 745, receiving the information bits again the predetermined plurality of times with the respective subset of the parity bits.

[0060] Figure 8 illustrates a system according to certain embodiments of the invention. It should be understood that each block of the flowchart of Figure 7 may be implemented by various means or their combinations, such as hardware, software, firmware, one or more processors and/or circuitry. In one embodiment, a system may include several devices, such as, for example, network element 810 and user equipment (UE) or user device 820. The system may include more than one UE 820 and more than one network element 810, although only one of each is shown for the purposes of illustration. A network element can be an access point, a base station, an eNode B (eNB), or any other network element, such as a next generation Node B (gNB).

[0061] Each of these devices may include at least one processor or control unit or module, respectively indicated as 814 and 824. At least one memory may be provided in each device, and indicated as 815 and 825, respectively. The memory may include computer program instructions or computer code contained therein, for example for carrying out the embodiments described above. One or more transceiver 816 and 826 may be provided, and each device may also include an antenna, respectively illustrated as 817 and 827. Although only one antenna each is shown, many antennas and multiple antenna elements may be provided to each of the devices. Other configurations of these devices, for example, may be provided. For example, network element 810 and UE 820 may be additionally configured for wired communication, in addition to wireless communication, and in such a case antennas 817 and 827 may illustrate any form of communication hardware, without being limited to merely an antenna.

[0062] Transceivers 816 and 826 may each, independently, be a transmitter, a receiver, or both a transmitter and a receiver, or a unit or device that may be configured both for transmission and reception. The transmitter and/or receiver (as far as radio parts are concerned) may also be implemented as a remote radio head which is not located in the device itself, but in a mast, for example. It should also be appreciated that according to the "liquid" or flexible radio concept, the operations and functionalities may be performed in different entities, such as nodes, hosts or servers, in a flexible manner. In other words, division of labor may vary case by case. One possible use is to make a network element to deliver local content. One or more functionalities may also be implemented as a virtual application that is provided as software that can run on a server.

[0063] A user device or user equipment 820 may be a mobile station (MS) such as a mobile phone or smart phone or multimedia device, a computer, such as a tablet, provided with wireless communication capabilities, personal data or digital assistant (PDA) provided with wireless communication capabilities, vehicle, portable media player, digital camera, pocket video camera, navigation unit provided with wireless communication capabilities or any combinations thereof. The user device or user equipment 820 may be a sensor or smart meter, or other device that may usually be configured for a single location.

[0064] In an exemplifying embodiment, an apparatus, such as a node or user device, may include means for carrying out embodiments described above in relation to Figure 7.

[0065] Processors 814 and 824 may be embodied by any computational or data processing device, such as a central processing unit (CPU), digital signal processor (DSP), application specific integrated circuit (ASIC), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), digitally enhanced circuits, or comparable device or a combination thereof. The processors may be implemented as a single controller, or a plurality of controllers or processors. Additionally, the processors may be implemented as a pool of processors in a local configuration, in a cloud configuration, or in a combination thereof. The term circuitry may refer to one or more electric or electronic circuits. The term processor may refer to circuitry, such as logic circuitry, that responds to and processes instructions that drive a computer.

[0066] For firmware or software, the implementation may include modules or units of at least one chip set (e.g., procedures, functions, and so on). Memories 815 and 825 may independently be any suitable storage device, such as a non-transitory computer-readable medium. A hard disk drive (HDD), random access memory (RAM), flash memory, or other suitable memory may be used. The memories may be combined on a single integrated circuit as the processor, or may be separate therefrom. Furthermore, the computer program instructions may be stored in the memory and which may be processed by the processors can be any suitable form of computer program code, for example, a compiled or interpreted computer program written in any suitable programming language. The memory or data storage entity is typically internal but may also be external or a combination thereof, such as in the case when additional memory capacity is obtained from a service provider. The memory may be fixed or removable. [0067] The memory and the computer program instructions may be configured, with the processor for the particular device, to cause a hardware apparatus such as network element 810 and/or UE 820, to perform any of the processes described above (see, for example, Figure 7). Therefore, in certain embodiments, a non-transitory computer- readable medium may be encoded with computer instructions or one or more computer program (such as added or updated software routine, applet or macro) that, when executed in hardware, may perform a process such as one of the processes described herein. Computer programs may be coded by a programming language, which may be a high-level programming language, such as objective-C, C, C++, C#, Java, etc., or a low- level programming language, such as a machine language, or assembler. Alternatively, certain embodiments of the invention may be performed entirely in hardware.

[0068] Furthermore, although Figure 8 illustrates a system including a network element 810 and a UE 820, embodiments of the invention may be applicable to other configurations, and configurations involving additional elements, as illustrated and discussed herein. For example, multiple user equipment devices and multiple network elements may be present, or other nodes providing similar functionality, such as nodes that combine the functionality of a user equipment and an access point, such as a relay node.

[0069] Certain embodiments may have various benefits and/or advantages. For example, certain embodiments may provide small latency for a user with large SNR. Likewise, certain embodiments may provide improved coverage for a user with small SNR. Furthermore, soft combining can be used. Low native rate in the code can be used in certain embodiments, and the low native rate may improve performance.

[0070] One having ordinary skill in the art will readily understand that the invention as discussed above may be practiced with steps in a different order, and/or with hardware elements in configurations which are different than those which are disclosed. Therefore, although the invention has been described based upon these preferred embodiments, it would be apparent to those of skill in the art that certain modifications, variations, and alternative constructions would be apparent, while remaining within the spirit and scope of the invention.

[0071] List of Abbreviations

[0072] CRC Cyclic redundancy check

[0073] LDPC Low density parity check (code)

[0074] LTE Long term evolution [0075] LSB Least significant bit(s)

[0076] NR New radio (5G)

[0077] PBCH Physical broadcast channel

[0078] S R Signal to noise ratio

[0079] SS Synchronization signal

[0080] UE User equipment