Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2020/116147
Kind Code:
A1
Abstract:
In the present invention, a buffer layer (102), an etch-stop layer (103), and a channel layer (104) are epitaxially grown, in this order, on a substrate (101). The substrate (101) is constituted, for example, by InP made to have high resistance by doping with Fe. The buffer layer (102) is constituted by a compound semiconductor lattice-matched to the InP. The etch-stop layer (103) is constituted by InxAl1-xP (0≤x≤0.75). The channel layer (104) is constituted by InyGa1-yAs(0

Inventors:
SUGIYAMA HIROKI (JP)
Application Number:
PCT/JP2019/045211
Publication Date:
June 11, 2020
Filing Date:
November 19, 2019
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NIPPON TELEGRAPH & TELEPHONE (JP)
International Classes:
H01L21/336; H01L21/338; H01L29/778; H01L29/78; H01L29/812
Foreign References:
JPH10256533A1998-09-25
JP2012248563A2012-12-13
JP2015103784A2015-06-04
Attorney, Agent or Firm:
YAMAKAWA, Shigeki et al. (JP)
Download PDF: