Title:
FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2020/245922
Kind Code:
A1
Abstract:
A gate opening section (110), a plurality of strip-shaped first opening sections (111a) arrayed in the gate width direction, second opening sections (111b) connecting adjacent first opening sections, and third opening sections (111c) connected on the side of the end part of the array of first opening sections (111a) that is separated from the array are formed in an insulation layer (109). An ohmic cap layer (106) is etched through the opening sections, and a non-symmetrical recess region (112) is formed.
Inventors:
TSUTSUMI TAKUYA (JP)
MATSUZAKI HIDEAKI (JP)
MATSUZAKI HIDEAKI (JP)
Application Number:
PCT/JP2019/022209
Publication Date:
December 10, 2020
Filing Date:
June 04, 2019
Export Citation:
Assignee:
NIPPON TELEGRAPH & TELEPHONE (JP)
International Classes:
H01L21/338; H01L29/778; H01L29/812
Foreign References:
| JP2002184786A | 2002-06-28 | |||
| JP2003059944A | 2003-02-28 | |||
| JPH10125696A | 1998-05-15 | |||
| JP2004214321A | 2004-07-29 | |||
| JPH11162994A | 1999-06-18 |
Attorney, Agent or Firm:
YAMAKAWA, Shigeki et al. (JP)
Download PDF: