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Title:
PIEZOELECTRIC/ELECTROSTRICTIVE FILM TYPE CHIP
Document Type and Number:
WIPO Patent Application WO/1997/003836
Kind Code:
A1
Abstract:
A piezoelectric/electrostrictive film type chip (50) comprises a spacer plate (74) having a window arrangement pattern (100) composed of at least a plurality of windows (75), a ceramic substrate (70) integrated with a thin closure plate (72) covering the windows (75), and a piezoelectric/electrostrictive actuating section (71) composed of a lower electrode (81), a piezoelectric/electrostrictive layer (82) and an upper electrode (83) which are successively formed in multilayer by a film-forming method in the area covering the windows (75) on the outer surface of the closure plate (72). A positioning pin hole (52) is provided at or near the center of gravity of the window arrangement pattern (100). The lowering of the accuracy of the alignment of the pin pressure with the communication hole of the piezoelectric/electrostrictive actuator is suppressed to a minimum, and therefore the chip is joined to the ink-nozzle member with good positional accuracy.

Inventors:
USUI MINORU (JP)
KATAKURA TAKAHIRO (JP)
AKAHANE FUJIO (JP)
KAMOI KAZUMI (JP)
SHINADA SATOSHI (JP)
TAKEUCHI YUKIHISA (JP)
TAKAHASHI NOBUO (JP)
Application Number:
PCT/JP1996/002054
Publication Date:
February 06, 1997
Filing Date:
July 23, 1996
Export Citation:
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Assignee:
SEIKO EPSON CORP (JP)
NGK INSULATORS LTD (JP)
USUI MINORU (JP)
KATAKURA TAKAHIRO (JP)
AKAHANE FUJIO (JP)
KAMOI KAZUMI (JP)
SHINADA SATOSHI (JP)
TAKEUCHI YUKIHISA (JP)
TAKAHASHI NOBUO (JP)
International Classes:
B41J2/045; B41J2/14; B41J2/16; (IPC1-7): B41J2/045
Foreign References:
JPH0345812Y21991-09-27
JPS63256453A1988-10-24
JPH06336012A1994-12-06
Other References:
See also references of EP 0785071A4
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