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Title:
IMAGE DISPLAY APPARATUS AND MOUNTING INSPECTION METHOD FOR SAME
Document Type and Number:
WIPO Patent Application WO/2014/046099
Kind Code:
A1
Abstract:
Provided are: an image display apparatus wherein the COG mounting state of an IC chip that is mounted on a substrate by COG mounting can be easily checked; and a mounting inspection method for the image display apparatus. An image display apparatus (1) is provided with: an image display panel having a TFT array substrate; an IC chip (5) mounted on the image display panel by COG mounting; and an FPC (6) electrically connected to the IC chip. The image display apparatus is configured by having the TFT array substrate (3) provided with first connecting wiring (21) that electrically connects an IC connecting pad and an FPC connecting pad to each other, and by having the FPC provided with test pads (41, 42), second connecting wiring (22) that electrically connects the test pads and an FPC-side connecting pad (60) to each other, and short-circuiting wiring (23) that short-circuits dummy pads to each other via the FPC-side connecting pad. In this mounting inspection method, the mounting state of the IC chip is inspected by measuring electrical resistance between the test pads.

Inventors:
KAZIKAWA YOSUKE
Application Number:
PCT/JP2013/075069
Publication Date:
March 27, 2014
Filing Date:
September 18, 2013
Export Citation:
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Assignee:
SHARP KK (JP)
International Classes:
G09F9/00; G02F1/13; G02F1/1345; G09F9/30
Domestic Patent References:
WO2010016312A12010-02-11
Foreign References:
JP2009282285A2009-12-03
JP2008241748A2008-10-09
JP2003090856A2003-03-28
JP2009223265A2009-10-01
JP2010145712A2010-07-01
JPH06250199A1994-09-09
Attorney, Agent or Firm:
SANO SHIZUO (JP)
Shizuo Sano (JP)
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