Title:
INFORMATION PROCESSING DEVICE, METHOD, AND PROGRAM
Document Type and Number:
WIPO Patent Application WO/2024/042717
Kind Code:
A1
Abstract:
This information processing device comprises: a generator that generates a plurality of quantum bits and a plurality of signals; a converter that converts the plurality of signals to a plurality of analog signals of which the signal levels are equalized; a multiplexer that outputs a multiplexed signal obtained by multiplexing the plurality of analog signals; a divider that divides the multiplexed signal into a plurality of divided signals; a plurality of attenuators that attenuate the plurality of divided signals and apply the attenuated signals to the plurality of quantum bits; and a setter that transmits, to the plurality of attenuators, a shared setting signal that indicates the respective attenuation amounts of the plurality of attenuators, wherein the attenuation amounts of the plurality of attenuators is set on the basis of the setting signal.
Inventors:
KAWASHITA MITSUYA (JP)
Application Number:
PCT/JP2022/032248
Publication Date:
February 29, 2024
Filing Date:
August 26, 2022
Export Citation:
Assignee:
FUJITSU LTD (JP)
International Classes:
G06N10/40
Foreign References:
| JP2022536594A | 2022-08-18 | |||
| US20200403137A1 | 2020-12-24 | |||
| US20210350268A1 | 2021-11-11 |
Other References:
PARK JONG-SEOK, SUBRAMANIAN SUSHIL, LAMPERT LESTER, MLADENOV TODOR, KLOTCHKOV ILYA, KURIAN DILEEP J., JUAREZ-HERNANDEZ ESDRAS, PER: "13.1 A Fully Integrated Cryo-CMOS SoC for Qubit Control in Quantum Computers Capable of State Manipulation, Readout and High-Speed Gate Pulsing of Spin Qubits in Intel 22nm FFL FinFET Technology", 2021 IEEE INTERNATIONAL SOLID- STATE CIRCUITS CONFERENCE (ISSCC), IEEE, 13 February 2021 (2021-02-13) - 22 February 2021 (2021-02-22), pages 208 - 210, XP093142885, ISBN: 978-1-7281-9549-0, DOI: 10.1109/ISSCC42613.2021.9365762
Attorney, Agent or Firm:
ITOH, Tadashige et al. (JP)
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