Title:
INFORMATION PROCESSING DEVICE AND METHOD
Document Type and Number:
WIPO Patent Application WO/2019/003888
Kind Code:
A1
Abstract:
The present disclosure relates to an information processing device and method which allow an increase in circuit scale to be suppressed. Multiple pieces of information to be used for decoding are stored in mutually different regions of a storage unit, the regions for storing the pieces of information are shifted in accordance with decoding-related operations so as to correspond to shifts in a column direction of a check matrix for the decoding, the pieces of information are read from predetermined regions of the storage unit, the decoding-related operations are performed using the pieces of information read from the storage unit, the pieces of information are updated, and the updated pieces of information are rearranged so as to correspond to the shifts in the column direction of the check matrix and written into the predetermined regions of the storage unit. The present disclosure can be applied, for example, to an information processing device, a communication device, a reception device, an information processing method, or a program.
Inventors:
SAKAI LUI (JP)
YAMAMOTO MAKIKO (JP)
YAMAMOTO MAKIKO (JP)
Application Number:
PCT/JP2018/022302
Publication Date:
January 03, 2019
Filing Date:
June 12, 2018
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H03M13/19
Foreign References:
| JP2009260692A | 2009-11-05 | |||
| US20110126078A1 | 2011-05-26 | |||
| JP2011205578A | 2011-10-13 |
Other References:
MIYATA, YOSHIKUNI ET AL.: "Reduced-Complexity Decoding Algorithm for LDPC Codes for Practical Circuit Implementation in Optical Communications", OFC/NFOEC 2007, 15 October 2007 (2007-10-15), pages 1 - 3, XP031146823
Attorney, Agent or Firm:
NISHIKAWA Takashi et al. (JP)
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