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Patent Searching and Data


Title:
INTERPOSER, SEMICONDUCTOR DEVICE, INTERPOSER MANUFACTURING METHOD, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Document Type and Number:
WIPO Patent Application WO/2015/151512
Kind Code:
A1
Abstract:
Provided are: an interposer having sufficient reliability by preventing a conductive layer pattern from peeling due to thermal expansion and thermal contraction; a semiconductor device; an interposer manufacturing method, and a semiconductor device manufacturing method. An interposer (100) of the present invention is provided with: a base material (1) having a through hole; an insulating resin layer (7), which is formed on a surface of the base material (1), and which has a conductive via (9); a wiring layer (8) that is disposed on the base material (1) with the insulating resin layer (7) therebetween; an inorganic adhesive layer (4) that is formed merely on the side wall of a through hole (13); and a penetrating electrode (3), which is applied in a connection hole formed of the inorganic adhesive layer (4) in the through hole, and which is capable of electrically connecting together both the surfaces of the base material (1). The penetrating electrode (3) is electrically connected to the wiring layer (8) via the conductive via (9), and the thermal expansion coefficient of the inorganic adhesive layer (4) is larger than that of the base material (1), and is smaller than that of the penetrating electrode (3).

Inventors:
IMAYOSHI KOJI (JP)
KIUCHI SYUJI (JP)
Application Number:
PCT/JP2015/001854
Publication Date:
October 08, 2015
Filing Date:
March 31, 2015
Export Citation:
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Assignee:
TOPPAN PRINTING CO LTD (JP)
International Classes:
H01L23/12
Domestic Patent References:
WO2013150940A12013-10-10
Foreign References:
JP2013521663A2013-06-10
JP2012114400A2012-06-14
JP2004111915A2004-04-08
JP2007059452A2007-03-08
Other References:
See also references of EP 3128547A4
Attorney, Agent or Firm:
HIROSE, Hajime et al. (JP)
Hirose 1 (JP)
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