KEY MATRIX CIRCUIT DEVICE AND INPUT DEVICE

WIPO Patent Application WO/2022/137984

A1

The present invention provides a key matrix circuit device and an input device capable of directly utilizing a power supply voltage that is higher than an upper-limit voltage inputtable into an information processing device.　The key matrix circuit device includes: a key matrix including a plurality of switches and a plurality of voltage-dividing resistors connected between a plurality of sense terminals and the plurality of switches; and a wake-up circuit including an output terminal from which is outputted a switching signal causing the information processing device to switch to a power-saving mode or a normal mode, a power supply terminal connected to a power supply, and a connecting terminal connected to the power supply terminal and a plurality of scan terminals, wherein the plurality of voltage-dividing resistors have resistance values that bring the voltages of the plurality of sense terminals connected to a plurality of sense ports of the information processing device down to a prescribed voltage or lower, and if one of the plurality of switches is switched on and the potential of the connecting terminal goes to a first level while the information processing device is in the power-saving mode, the wake-up circuit outputs, from the output terminal, the switching signal for switching to the normal mode.

JPS63613	INPUT DEVICE
JPH06231186	DOCUMENT PROCESSOR
JP2012150842	ELECTRONIC APPARATUS AND KEY OPERATION CONTROL METHOD

TAKEUCHI GENKI (JP)
KOBAYASHI TETSURO (JP)

PCT/JP2021/043485

June 30, 2022

November 26, 2021

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ALPS ALPINE CO LTD (JP)

G06F3/023

JP2010282253A	2010-12-16
JP2002108519A	2002-04-12
JP2008265633A	2008-11-06

ITOH, Tadashige et al. (JP)

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