Title:
MEMORY CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2015/041304
Kind Code:
A1
Abstract:
One end of the current path of a second field-effect transistor is connected to the gate of a first field-effect transistor, one end of the current path of the first field-effect transistor is connected to one end of a magnetic-tunnel-junction element, the other end of the current path of the first field-effect transistor is connected to a first control terminal, the other end of the magnetic-tunnel-junction element is connected to a second control terminal, and the other end of the current path of the second field-effect transistor is connected to a third control terminal.
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Inventors:
OHSAWA TAKASHI (JP)
ENDOH TETSUO (JP)
ENDOH TETSUO (JP)
Application Number:
PCT/JP2014/074740
Publication Date:
March 26, 2015
Filing Date:
September 18, 2014
Export Citation:
Assignee:
UNIV TOHOKU (JP)
International Classes:
G11C11/15
Foreign References:
| JP2010520576A | 2010-06-10 |
Attorney, Agent or Firm:
KIMURA MITSURU (JP)
Mitsuru Kimura (JP)
Mitsuru Kimura (JP)
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