Title:
MEMORY DEVICE, AND MEMORY DEVICE POWER SOURCE CONTROL METHOD
Document Type and Number:
WIPO Patent Application WO/2023/190324
Kind Code:
A1
Abstract:
The present invention includes a first and a second memory, and a control circuit that receives write access and read access from the outside, and performs write and read control with respect to the first memory. If a signal prompting a power source shutoff is received, the control circuit: executes a data saving process for writing, to the second memory, only the difference between data stored in a data storage region of the first memory and data stored in a data storage region of the second memory; stops the power supply to the first and the second memory following the data saving process; and when a signal prompting power on is received, starts the power supply to the first and the second memory, and then executes a data recovery process for writing the data stored in the data storage region of the second memory to the first memory.
More Like This:
| WO/2015/055728 | METHOD AND APPARATUS FOR SUPPORTING THE USE OF INTERLEAVED MEMORY REGIONS |
| JPH04153846 | STORAGE DEVICE |
Inventors:
YAMAZAKI ATSUSHI (JP)
Application Number:
PCT/JP2023/012173
Publication Date:
October 05, 2023
Filing Date:
March 27, 2023
Export Citation:
Assignee:
LAPIS TECH CO LTD (JP)
International Classes:
G06F12/06; G11C5/14
Foreign References:
| JP2013088928A | 2013-05-13 | |||
| JP2008276646A | 2008-11-13 | |||
| JP2005321938A | 2005-11-17 | |||
| JP2015230611A | 2015-12-21 | |||
| JP2006302466A | 2006-11-02 |
Attorney, Agent or Firm:
LEXT, P.C. (JP)
Download PDF: