Title:
MEMORY MODULE
Document Type and Number:
WIPO Patent Application WO/2023/017638
Kind Code:
A1
Abstract:
A memory module according to one aspect of the present disclosure comprises a plurality of memory cell array units. Each memory cell array unit has a memory cell array in which memory cells are provided one by one at intersections of a plurality of first wirings and a plurality of second wirings. Each memory cell array unit further has a control unit that controls the reading and writing of data from and to the memory cell array. The memory cell has a variable resistance element for recording 1-bit information depending on whether a resistance value is high or low, and a selection element connected in series to the variable resistance element. The control unit performs a detection operation for detecting the memory cell state of the memory cell and subsequently, when the selection element is turned on by the detection operation, performs a reset operation for changing the turned-on memory cell from a low-resistance state to a high-resistance state.
Inventors:
MORI YOTARO (JP)
NISHINO RIICHI (JP)
SHIBAHARA YOSHIYUKI (JP)
NISHINO RIICHI (JP)
SHIBAHARA YOSHIYUKI (JP)
Application Number:
PCT/JP2022/011856
Publication Date:
February 16, 2023
Filing Date:
March 16, 2022
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
G11C13/00
Foreign References:
| JP2019160375A | 2019-09-19 |
Attorney, Agent or Firm:
TSUBASA PATENT PROFESSIONAL CORPORATION (JP)
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