Title:
METHOD FOR DICING MESA-DIODES
Document Type and Number:
WIPO Patent Application WO/2001/022475
Kind Code:
A2
Abstract:
The invention relates to the manufacture of semiconductor elements (10), in which manufacturing process a part of a semiconductor body (11) having a silicon substrate from which the semiconductor elements (10) are formed is removed by means of powder blasting. For this purpose, the surface of the semiconductor body (11) is provided with a mask pattern (40). The (111) crystal orientation is chosen as the crystal orientation of the substrate (32), and the longitudinal direction (M) of the mask pattern (40) is aligned with respect to the (110) crystal orientation (L) of the substrate (32) in such a manner that the removed part of the semiconductor body (11) has a symmetrical profile when viewed in cross-section.
Inventors:
BOUTEN PETRUS C P
Application Number:
PCT/EP2000/008977
Publication Date:
March 29, 2001
Filing Date:
September 13, 2000
Export Citation:
Assignee:
KONINKL PHILIPS ELECTRONICS NV (NL)
International Classes:
H01L21/329; B24C3/32; H01L21/304; H01L21/78; H01L29/04; (IPC1-7): H01L/
Foreign References:
| US3693302A | 1972-09-26 |
Other References:
PATENT ABSTRACTS OF JAPAN vol. 013, no. 380 (M-863), 23 August 1989 (1989-08-23) & JP 01 133703 A (HITACHI LTD), 25 May 1989 (1989-05-25)
Attorney, Agent or Firm:
Smeets, Eugenius T. J. M. (Internationaal Octrooibureau B.V. Prof
Holstlaan 6 AA Eindhoven, NL)
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Claims:
CLAIMS:
| 1. | A method of manufacturing a semiconductor device having a semiconductor body (11) comprising a monocrystalline semiconductor substrate (32) of silicon the surface of which has a crystal orientation, in which semiconductor substrate a semiconductor element (10) is formed, and the surface of the semiconductor body (11) is covered with a mask pattern (40), after which a part (50) of the semiconductor body (11) is removed by means of powder blasting, characterized in that the (111) crystal orientation is chosen as the crystal orientation of the substrate (32), and the longitudinal direction (M) of the mask pattern (40) is aligned with respect to the (111) crystal orientation (L) of the substrate (32) in such a way that the removed part (50) of the semiconductor body (11) has a symmetric profile when viewed in crosssection. |
| 2. | A method as claimed in claim 1, characterized in that the longitudinal direction (M) of the mask pattern (40) is placed at an angle (60) with respect to the (100) or (110) axes of symmetry of the silicon substrate (32) which are projected on the (111) plane of the silicon substrate (32), which angle ranges between 20 and 40 degrees plus or minus an integral number of times 60 degrees, and is preferably approximately equal to 30 degrees plus or minus an integral number of times 60 degrees. |
| 3. | A method as claimed in claim 1 or 2, wherein a mesashaped body (10) is formed from the semiconductor body (11), is characterized in that the mask pattern (40) is formed by a number of rows of submasks (41), with two adjacent rows being shifted with respect to each other over half the distance between two submasks (41). |
| 4. | A method as claimed in claim 3, characterized in that the submasks (41) are provided with a round shape. |
| 5. | A method as claimed in claim 3, characterized in that the submasks (41) are provided with the shape of a regular hexagon. |
| 6. | A method as claimed in any one of the preceding claims, characterized in that the ratio of the width (W) of the removed part (50) of the semiconductor body (11) to the thickness (D) of the removed part (50) of the semiconductor body (11) is chosen to range between 3 and 1/3, and preferably between 2 and'4. |
| 7. | A method as claimed in any one of the preceding claims, characterized in that a discrete semiconductor element (10) is formed as the semiconductor element (10). |
| 8. | A method as claimed in any one of the preceding claims, characterized in that a semiconductor diode (10) is formed as the semiconductor element (10). |
| 9. | A method as claimed in any one of the preceding claims, characterized in that the substrate (32) is provided with a facet extending parallel to one of the (110) planes. |
| 10. | A semiconductor device manufactured in accordance with a method as claimed in any one of the preceding claims. |
Description:
INTERNATIONAL SEARCH REPORT Inter'onal Application No PCI/EP 00/08977 C. (Continuation) DOCUMENTS CONSIDERED TO BE RELEVANT Category ° Citation of document, with indication, where appropriate, of the relevant passages Relevant to claim No. A PATENT ABSTRACTS OF JAPAN 1, 10 vol. 013, no. 380 (M-863), 23 August 1989 (1989-08-23) &JP O1 133703 A (HITACHI LTD), 25 May 1989 (1989-05-25) abstract 3 INTERNATIONAL SEARCH ------------------- Inter onal Application No formation on patent family Inter onal Application No PCI/EP 00/08977 Patent document Publication Patent family Publication cited in search report date member (s) date FR 1527154 A 04-11-1968 NONE US 4304043 A 08-12-1981 JP 53068567 A 19-06-1978 JP 1192976 C 29-02-1984 JP 53068568 A 19-06-1978 JP 58026653 B 04-06-1983 JP 53074358 A 01-07-1978 DE 2753207 A 01-06-1978 GB 1559717 A 23-01-1980 NL 7713114 A, B, 01-06-1978 EP 0840364 A 06-05-1998 CA 2217084 A 30-04-1998 JP 10135160 A 22-05-1998 JP 01133703 A 25-05-1989 NONE