Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
METHOD FOR PREPARING SILICON OXIDE AND SILICON NITRIDE SUPERLATTICE STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2022/141355
Kind Code:
A1
Abstract:
The present invention relates to a method for preparing a silicon oxide and silicon nitride superlattice structure. The method for preparing the silicon oxide and silicon nitride superlattice structure comprises the following steps: providing a substrate; and alternately performing a first deposition process and a second deposition process, and forming the silicon oxide and silicon nitride superlattice structure on the surface of the substrate. The first deposition process comprises repeatedly performing a first cycle step for several times. The first cycle step comprises: forming a silicon oxide layer on the surface of the substrate by using an atomic layer deposition process. The second deposition process comprises repeatedly performing a second cycle step for several times. The second cycle step comprises: forming a silicon nitride layer on the surface of the silicon oxide layer by using the atomic layer deposition process. In the present invention, the effect of precisely controlling the thickness of the silicon oxide layer and the thickness of the silicon nitride layer is realized, and the atomic layer level of an ultra-thin superlattice film is controllable, thereby forming the silicon oxide and silicon nitride superlattice structure having higher quality.

Inventors:
MA HONGPING (CN)
ZHANG YUANLAN (CN)
Application Number:
PCT/CN2020/141977
Publication Date:
July 07, 2022
Filing Date:
December 31, 2020
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
GUANGHUA LINGANG ENGINEERING APPLICATION AND TECH R&D SHANGHAI CO LTD (CN)
International Classes:
H01L31/0352; H01L21/02
Foreign References:
CN105845549A2016-08-10
CN103972080A2014-08-06
CN111276484A2020-06-12
CN109536921A2019-03-29
CN109576677A2019-04-05
CN111560598A2020-08-21
US20080038486A12008-02-14
Other References:
FONG S. W.; SOOD A.; CHEN L.; KUMARI N.; ASHEGHI M.; GOODSON K. E.; GIBSON G. A.; WONG H.-S. P.: "Thermal conductivity measurement of amorphous dielectric multilayers for phase-change memory power reduction", JOURNAL OF APPLIED PHYSICS, AMERICAN INSTITUTE OF PHYSICS, 2 HUNTINGTON QUADRANGLE, MELVILLE, NY 11747, vol. 120, no. 1, 7 July 2016 (2016-07-07), 2 Huntington Quadrangle, Melville, NY 11747, XP012209052, ISSN: 0021-8979, DOI: 10.1063/1.4955165
Attorney, Agent or Firm:
SHANGHAI WINSUN INTELLECTUAL PROPERTY AGENCY (CN)
Download PDF: