CARBON INTO SILICON NITRIDE FILMS

BACKGROUND

Field

Silicon nitride films for integrated circuits.

Description of Related Art

Incorporation of carbon in stabilized form can be used to improve ash stability and etch selectivity of silicon nitride deposited via either plasma-enhanced atomic layer deposition (ALD) or flowable chemical vapor deposition (CVD) methods. One technique for introducing carbon into a silicon nitride film is by introducing organic carbon species such as methyls, carbosilanes, etc. at the time of deposition. The organic carbon species introduced in this manner risks being removed thermally or through plasma processing. BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 shows a schematic of a representative deposition system.

Figure 2 illustrates a schematic representation of a method of depositing a silicon nitride film or layer on a substrate by an ALD process.

Figure 3 presents a symbolic representation of the chemical reactions occurring in the ALD process.

Figure 4 presents a symbolic representation of the chemical reactions occuring in a CVD process.

Figure 5 is an interposer implementing one or more embodiments.

Figure 6 illustrates an embodiment of a computing device.

DETAILED DESCRIPTION

A silicon nitride composition or film incorporating carbon that is bound to two or more nitrogen atoms is described as an integrated circuit device including a substrate incorporating such a silicon nitride film or composition. Methods for forming a silicon nitride film having carbon incorporated pre-bound to two or more nitrogen atoms are also described.

In one embodiment, a method of forming a silicon nitride composition as a dielectric film includes depositing a silicon nitride precursor having a general formula of General Formula I: R

R ₂ N *— C - R ₃

General Formula I wherein dashed lines represents an optional bond,

wherein Ri is selected from a hydrogen atom, a substituted amine or nothing at all, wherein R ₂ and R are independently selected from a C ₁ -C ₄ alkylsilyl, and

wherein R4 is C _x H _m R ₅ C _y H _n and x and y are independently is 0 or 1, m and n are independently 0, 1 or 2 and R ₅ is a C ₁ -C ₄ alkylsilyl or nothing at all.

The deposited silicon nitride precursor is reacted with a co-reactant such as ammonia, an amine or a multifunctional nitrile (e.g., fumaronitrile, succinonitrile) to form a silicon nitride composition or film. Forming such composition or film using a silicon nitride precursor having the formula of General Formula I incorporates carbon atoms into the composition pre-bound to two or more nitrogen atoms. The composition or film is referenced herein as a silicon nitride composition or film despite containing carbon atoms (a silicon nitride-like composition or film). A silicon nitride film derived from a silicon nitride precursor having the formula of General Formula I may be used, for example, as a passivation layer on semiconductor integrated circuits, as an etch mask or as a dielectric between plates in, for example, an analog chip.

In one embodiment, the silicon nitride precuror having the formula of General Formula I is a carbodiimide, amidine, or guanidine containing reactive N-bis bonds.

Examples include, but are not limited to, N,N-bis(trimethylsilyl) carbodiimide, N,N- bis(trimethylsilyl) amidine and N,N-bis(trimethylsilyl) guanidine.

H 3C CH3

\ /

.Si .

=C =N H ₃

H

N,N-bis( trimethylsilyl) carbodiimide H ₃

N,N-bis( trimethylsilyl) amidine

N,N-bis( trimethylsilyl ) guanidine

Other examples of silicon nitride precursors having the general formula of General Formula I include heterocyclic complexes including, but are not limited to, N-silylated heterocylic complexes such as triazine and triazole.

Triazine Triazole

The method of forming a silicon nitride composition can be performed by atomic layer deposition (ALD) or chemical vapor deposition (CVD) processes. Figure 1 shows a schematic of a representative deposition system. The system can representatively be used for a CVD or ALD process. System 100 includes chamber 102 having an interior volume suitable to accommodate a substrate, such as a semiconductor wafer. Chamber 102 includes stage 115 on which a substrate can be supported. Figure 1 shows substrate 120 such as a wafer optionally having a plurality of transistor devices formed thereon on stage 115 in a device side up configuration. Connected to an interior volume of chamber 102 are a number of process gas sources, including gas source 104 of, for example, a silicon nitride precursor having the formula of General Formula I; gas source 106 of, for example, a first co-reactant; and gas source 108 of, for example, a second co-reactant, a purge gas or other gas source. Also connected to chamber 102 is plasma activator 110 and/or plasma activator 112. Remote plasma activator 110 is separate from and communicates with chamber 102 while plasma activator 112 may be operated directly in chamber 102 (e.g., a capacitively coupled plasma electrode). In one example, a plasma activator such as remote plasma generator 110 and/or plasma generator 112 includes a plasma or ionization source for activating gas source 114, such as a hydrogen or other gas source(s) for introduction of an activated species into chamber 102 (plasma source to include ions, electrons, protons and radicals of the activated gas). The plasma source may be described in terms of energy density related to factors such as an energy applied to the gas source at the plasma activator (e.g., to establish a concentration of activated species in the plasma source) and the distance of plasma activator from a substrate surface in chamber 102. Energy density is one variable associated with a plasma source. Typical plasma densities can be in a range from 0.1 W/cm ² to 1.0 W/cm ² . Other variables include the duration or exposure time of the substrate (or reactants) to the plasma source and when a plasma source is introduced. For an ALD process, in one embodiment, the plasma source may be introduced during more than one of the pulses of an ALD process (e.g., during the purge pulse, co-reactant pulse or both) in a plasma-enhanced ALD (PEALD) process.

Similarly, a plasma source may be introduced with the precursor and co-reactant(s) in a CVD process in plasma-enhanced CVD (PECVD) process.

System 100 also includes an example of a heat source (shown as heat source 116) that may be used to heat an interior of chamber 102 to a desired temperature for a reaction between a substrate and the precursor or precursor and co-reactant(s). Figure 1 shows temperature source 116 disposed within chamber 102 (in this case, within a stage within the chamber). It is to be appreciated that a suitable reactor may include hotwall or coldwall chambers. Figure 1 also shows evacuation source 118 connected to an interior chamber 102 to evacuate excess or non-reactive constituents or process gases (e.g., precursor, co-reactant) from the chamber. Evacuation source 118 may be connected to a vacuum pump or other source (not shown).

Figure 2 illustrates a schematic representation of a method of depositing a silicon nitride film or layer on a substrate by an ALD process. Figure 3 presents a symbolic representation of the chemical reactions occurring in the ALD process using a silicon nitride precursor of General Formula I that is N,N-bis(trimethylsilyl) carbodiimide. In one embodiment, the method begins by placing a substrate in a chamber of an ALD system such as system 100 of Figure 1 (block 210, Figure 2). The substrate may be a silicon wafer including a plurality of transistors formed thereon and, for example, at least one dielectric layer deposited on its surface. The substrate may be heated within the reactor to a

temperature between around 50°C and around 500°C. A representative pressure within the reactor may range from 0.1 Torr to 10 Torn

In one embodiment, a first co-reactant of a Lewis acidic chlorosilane co-reactant is introuced (e.g., pulsed) into the chamber and deposited on the substrate (block 215, Figure 2). Representatively, in an ALD process, N-Si bonds of a silicon nitride precursor having the formula of General Formula 1 are susceptible to metathesis reactions with a Lewis acidic chlorosilane such as silicon tetrachloride, hexachlorodisilane, trichlorosilane and

dichlorosilane. When used as a co-reactant with a silicon nitride precursor, the silicon nitride precursor is incorporated into a film in conjunction with the chlorosilane and a volatile less Lewis acidic by-product (e.g., a chloride) and an alkylsilyl chloride is removed as part of the process (see Figure 3). The pulsing of the Lewis acidic chlorosilane (e.g., silicon

tetrachloride, hexachlorodisilane, trichlorosilane and dichlorosilane) can be between about 1 second to 20 seconds with a flow rate of up to 10 standard liters per minute (SLM).

The chamber of the ALD system is then purged in preparation for introducing a silicon nitride precursor having the formula of General Formula I (block 220, Figure 2). Examples of purge gases include, but are not limited to, nitrogen (N ₂ ), helium (He) and Argon (Ar) or other non-reactive gases. Purging can be between about 0.5 seconds and 40 seconds. A silicon nitride precursor having the formula of General Formula I is then introduced into the chamber (block 225, Figure 2). In one embodiment, the silicon nitride precursor is N,N-bis(trimethylsilyl) carbodiimide. A representative deposition pulse for a silion nitride precursor includes, but are not limited to, a pulse duration of between around 0.5 seconds and 20 seconds, a flow rate of up to 10 SLM, a reactor pressure between around 0.05 Torr and 1000 Torr, a temperature between around 80°C and 200°C, a substrate temperature between around 100°C and around 400°C, and an RF energy source that may be applied at a power that ranges from 5 W to 200 W and at a frequency of 13.56 MHz, 27

MHz, or 60 MHz. It should be noted that the scope of embodiments includes any possible set of process parameters that may be used to carry out the embodiments described herein.

The chamber of the system is then purged again in preparation for introducing second co-reactant (block 230, Figure 2). In some embodiments, the purging is performed with plasma. Plasma purging can be between about 0.5 seconds and 10 seconds. A second co- reactant of, for example, ammonia is then introduced into the chamber (block 235, Figure 2). A silicon nitride precursor such as a carbodiimide, a carbodiimide precursor possesses four sites for reaction with a co-reactant such as ammonia (2 Si-Cl and 2 C=N bonds) in addition to Si-H bonds that can be activated via plasma (see Figure 3). Remaining Si-Cl bonds could react with additional carbodiimide depending on process conditions. In such case, extended polymer material would be formed that could still react with ammonia during a next pulse. A representative deposition of ammonia in an ALD process is a pulse duration of 0.5 seconds to 20 seconds. The chamber may then be purged for about 0.5 seconds to 10 seconds. The sequence of first co-reactant pulse/purge/precursor pulse/purge/second co-reactant pulse/purge is repeated until a target silicon nitride film having bound carbon film thickness is achieved on the substrate (block 245, Figure 2).

The above method or process for forming a silicon nitride film is based on

chlorosilane-type PEALD process. Silicon nitride precursors having the formula of General Formula I can also be used as co-reactants in low temperature flowable CVD processes in conjunction with a first co-reactant of a silylamine such as trisilylamine ((HSi) N) where direct Si-N/Si-N metathesis or Si-N/Si-H metathesis occurs leading to incorporation of the reactive carbon bound nitrogen unit in the growing film. A plasma based on ammonia, oxygen, argon or other gases may be used as part of the flowable CVD process. In general, this type of process is carried out at substrate temperatures between 20°C and 100°C with continuous flow of coreactants in defined ratios. The deposition is followed by a higher temperature bake and/or ultraviolet (UV), e-beam or other cure to convert initially deposited film into denser silicon-nitride like film. Figure 4 presents a symbolic representation of the chemical reactions occuring in a CVD process.

Figure 5 illustrates interposer 300 that includes one or more embodiments. Interposer

300 is an intervening substrate used to bridge a first substrate 302 to second substrate 304. First substrate 302 may be, for instance, an integrated circuit die. Second substrate 304 may be, for instance, a memory module, a computer motherboard, or another integrated circuit die. Generally, the purpose of interposer 300 is to spread a connection to a wider pitch or to reroute a connection to a different connection. For example, interposer 300 may connect an integrated circuit die to ball grid array (BGA) 306 that can subsequently be connected to second substrate 304. In some embodiments, first and second substrates 302/304 are attached to opposing sides of interposer 300. In other embodiments, first and second substrates 302/304 are attached to the same side of interposer 300. In further embodiments, three or more substrates are interconnected by way of interposer 300.

Interposer 300 may be formed of an epoxy resin, a fiberglass-reinforced epoxy resin, a ceramic material, or a polymer material such as polyimide. In further implementations, the interposer may be formed of alternate rigid or flexible materials that may include the same materials described above for use in a semiconductor substrate, such as silicon, germanium, and other group III-V and group IV materials.

The interposer may include metal interconnects 308 and vias 310, including but not limited to through-silicon vias (TSVs) 312. Interposer 300 may further include embedded devices 314, including both passive and active devices. Such devices include, but are not limited to, capacitors, decoupling capacitors, resistors, inductors, fuses, diodes, transformers, sensors, and electrostatic discharge (ESD) devices. More complex devices such as radio- frequency (RF) devices, power amplifiers, power management devices, antennas, arrays, sensors, and MEMS devices may also be formed on interposer 300.

In accordance with embodiments, silicon nitride compositions and processes for their formation disclosed herein may be used in the fabrication of interposer 300.

Figure 6 illustrates computing device 400 in accordance with one embodiment.

Computing device 400 may include a number of components. In one embodiment, these components are attached to one or more motherboards. In an alternate embodiment, these components are fabricated onto a single system-on-a-chip (SoC) die rather than a

motherboard. The components in computing device 400 include, but are not limited to, integrated circuit die 402 and at least one communication chip 408. In some implementations communication chip 408 is fabricated as part of integrated circuit die 402. Integrated circuit die 402 may include CPU 404 as well as on-die memory 406, often used as cache memory, that can be provided by technologies such as embedded DRAM (eDRAM) or spin-transfer torque memory (STTM or STTM-RAM).

Computing device 400 may include other components that may or may not be physically and electrically coupled to the motherboard or fabricated within an SoC die.

These other components include, but are not limited to, volatile memory 410 (e.g., DRAM), non-volatile memory 412 (e.g., ROM or flash memory), graphics processing unit 414 (GPU), digital signal processor 416, crypto processor 442 (a specialized processor that executes cryptographic algorithms within hardware), chipset 420, antenna 422, display or a touchscreen display 424, touchscreen controller 426, battery 428 or other power source, a power amplifier (not shown), global positioning system (GPS) device 444, compass 430, motion coprocessor or sensors 432 (that may include an accelerometer, a gyroscope, and a compass), speaker 434, camera 436, user input devices 438 (such as a keyboard, mouse, stylus, and touchpad), and mass storage device 440 (such as hard disk drive, compact disk (CD), digital versatile disk (DVD), and so forth).

Communications chip 408 enables wireless communications for the transfer of data to and from computing device 400. The term "wireless" and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a non-solid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not. Communication chip 408 may implement any of a number of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 family), WiMAX (IEEE 802.16 family), IEEE 802.20, long term evolution (LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond. Computing device 400 may include a plurality of communication chips 408. For instance, a first communication chip may be dedicated to shorter range wireless communications such as Wi-Fi and Bluetooth and a second

communication chip may be dedicated to longer range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and others.

Processor 404 of computing device 400 includes one or more devices, such as transistors or metal interconnects, as well as silicon nitride passivation formed in accordance with embodiments presented above. The term "processor" may refer to any device or portion of a device that processes electronic data from registers and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory.

Communication chip 408 may also include one or more devices, such as transistors or metal interconnects, as well as silicon nitride passivation formed in accordance with embodiments presented above.

In further embodiments, another component housed within computing device 400 may contain one or more devices, such as transistors or metal interconnects, as well as silicon nitride passivation formed in accordance with implementations presented above.

In various embodiments, computing device 400 may be a laptop computer, a netbook computer, a notebook computer, an ultrabook computer, a smartphone, a tablet, a personal digital assistant (PDA), an ultra mobile PC, a mobile phone, a desktop computer, a server, a printer, a scanner, a monitor, a set-top box, an entertainment control unit, a digital camera, a portable music player, or a digital video recorder. In further implementations, computing device 400 may be any other electronic device that processes data.

EXAMPLES

Example 1 is a method of forming a dielectric film including depositing a silicon nitride precursor having the general formula of General Formula I:

wherein dashed lines individually represent an optional bond, wherein Ri is selected from a hydrogen atom, a substituted amine or nothing , wherein R ₂ and R are independently selected from a C ₁ -C ₄ alkylsilyl, wherein R4 is C _x H _m R ₅ C _y H _n and x and y are independently 0 or 1, m and n are independently 0, 1 or 2 and R ₅ is a C ₁ -C ₄ alkylsilyl; and reacting the silicon nitride precursor with a co-reactant.

In Example 2, the co-reactant in the method of Example 1 includes ammonia.

In Example 3, the silicon nitride precursor in the method of Example 2 is selected from a carbodiimide, an amidine and a guanidine.

In Example 4, the co-reactant in the method of Example 3 is ammonia and is a second co-reactant and before the silicon nitride precursor is reacted with the second co-reactant, the method includes reacting the silicon nitride precursor with a first co-reactant including a Lewis acidic chlorosilane.

In Example 5, the Lewis acidic chlorosilane in the method of Example 4 includes silicon tetrachloride, hexachlorodisilane, trichlorosilane and dichlorosilane.

In Example 6, depositing the silicon nitride precursor and reacting the silicon nitride precursor with the first co-reactant and the second co-reactant in the method of Example 4 includes an atomic layer deposition process.

In Example 7, the silicon nitride precursor in the method of Example 3 includes N,N- bis(trimethylsilyl)carbodiimide.

In Example 8, the silicon nitride precursor in the method of Example 3 includes N,N- bis(trimethylsilyl)amidine.

In Example 9, the silicon nitride precursor in the method of Example 3 includes N,N- bis(trimethylsilyl)guanidine.

In Example 10, the silicon nitride precursor in the method of Example 1 is selected from a triazine and a triazole.

In Example 11, depositing the silicon nitride precursor and reacting the silicon nitride precursor with the co-reactant in the method of any of Examples 6-10 includes a chemical vapor deposition process.

In Example 12, the co-reactant in the method of Example 11 is a second co-reactant and before the silicon nitride precursor is reacted with the second co-reactant, the method includes reacting the silicon nitride precursor with a first co-reactant including a silylamine.

Example 13 is a method of depositing a silicon nitride film including introducing a semiconductor substrate into a chamber; exposing the substrate to a silicon nitride precursor having the general formula of General Formula I: wherein dashed lines individually represent an optional bond, wherein Ri is selected from a hydrogen atom, a substituted amine or nothing, wherein R ₂ and R ₃ are independently selected from a C ₁ -C4 alkylsilyl, wherein R ₄ is C _x H _m R ₅ C _y H _n and x and y are independently 0 or 1, m and n are independently 0, 1 or 2 and R ₅ is a C ₁ -C4 alkylsilyl; and reacting the silicon nitride precursor with a co-reactant to form a silicon nitride film.

In Example 14, exposing the silicon nitride precursor to the substrate and reacting the silicon nitride precursor with the co-reactant in the method of Example 13 includes a chemical vapor deposition process.

In Example 15, exposing the silicon nitride precursor to the substrate and reacting the silicon nitride precursor with the co-reactant in the method of Example 13 includes an atomic layer deposition process.

In Example 16, the co-reactant in the method of Example 15 includes ammonia.

In Example 17, the silicon nitride precursor in the method of Example 16 is selected from a carbodiimide, an amidine and a guanidine.

In Example 18, the co-reactant in the method of Example 17 is a second co-reactant and before the silicon nitride precursor is reacted with the second co-reactant, the method includes reacting the silicon nitride precursor with a first co-reactant including a Lewis acidic chlorosilane.

In Example 19, the silicon nitride precursor in the method of Example 13 is selected from a triazine and a triazole. In Example 20, the co-reactant in the method of Example 13 is a second co-reactant and before the silicon nitride precursor is reacted with the second co-reactant, the method includes reacting the silicon nitride precursor with a first co-reactant including a silylamine.

Example 21 is an integrated circuit device including a semiconductor substrate; and a silicon nitride film on the semiconductor substrate, the silicon nitride film including carbon atoms bound to more than one nitrogen atoms.

In Example 22, the silicon nitride film of the integrated circuit device of Example 21 includes a passivation layer on an integrated circuit.

In Example 23, the silicon nitride film of the integrated circuit device of Example 21 includes an etch step.

In Example 24, the silicon nitride film of the integrated circuit device of any of Examples 20-23 is derived from a silicon nitride precursor having the general formula of General Formula I:

wherein dashed lines individually represent an optional bond, wherein Ri is selected from a hydrogen atom, a substituted amine or nothing , wherein R ₂ and R are independently selected from a C1-C4 alkylsilyl, wherein R4 is C _x H _m R ₅ C _y H _n and x and y are independently 0 or 1, m and n are independently 0, 1 or 2 and R ₅ is a C1-C4 alkylsilyl; and reacting the silicon nitride precursor with a co-reactant.

The above description of illustrated implementations, including what is described in the Abstract, is not intended to be exhaustive or to limit the invention to the precise forms disclosed. While specific implementations of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible within the scope, as those skilled in the relevant art will recognize.

These modifications may be made in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific implementations disclosed in the specification and the claims. Rather, the scope is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.