DBBP

FIELD OF INVENTION

The invention relates generally to Multi-view video coding and Three-Dimensional (3D) video coding. In particular, the present invention relates to optimized methods for depth-based block partitioning in 3D video coding.

BACKGROUND OF THE INVENTION

3D video coding is developed for encoding or decoding video data of multiple views simultaneously captured by several cameras. Since all cameras capture the same scene for both the input texture videos and depth videos, the depth information can be utilized to improve the motion compensation efficiency of texture videos. Especially, the corresponding depth block of the texture block can represent the pixel level object segmentation, so it is reasonable to realize pixel-level segment based motion compensation by utilizing the depth information. Therefore, a depth-based block partitioning (DBBP) is adopted for texture video coding in the current 3D- HEVC.

A single flag is added to the coding syntax to signal to the decoder that a block uses DBBP for prediction. When current coding unit is coded with the DBBP mode, the corresponding partition size is set to SIZE_2Nx2N and bi-prediction is inherited.

Whether the DBBP mode is used is signaled on coding unit as shown in Table 1. In currently design, the DBBP flag dbbp flag has no dependency with part mode.

Table 1

part mode ae(v) if( depth based bhVpart flag[ nuh layer id ] && CuPredMode[ xO ][ yO ] !=

MODE INTRA)

dbbp_flag[xO][yO] ae(v) if( sdcEnableFlag )

sdc_flag[xO][yO] ae(v) if( CuPredMode[ xO ][ yO ] = = MODE INTRA ) {

if( PartMode = = PART 2Nx2N && pcm enabled flag &&

log2CbSize >= Log2MinIpcmCbSizeY &&

log2CbSize <= Log2MaxIpcmCbSizeY )

pcm_flag[ xO ][ yO ] ae(v) if(pcm_flag[xO][yO] ){

while( !byte_aligned( ) )

pcm alignment zero bit f(l) pcm_sample( xO, yO, log2CbSize )

} else {

pbOffset = ( PartMode = = PART NxN ) ? ( nCbS 12) : nCbS

log2PbSize = log2CbSize - ( ( PartMode = = PART NxN ) ? 1 : 0 )

for( j = 0; j < nCbS; j = j + pbOffset )

for( i = 0; i < nCbS; i = i + pbOffset ) {

if( vps_depth_modes_flag[ nuh layer id ] )

intra_mode_ext( xO + i , y0+ j , log2PbSize )

if( dim_not_present_flag[ xO + i ] [ yO + j ] )

prev intra luma pred _flag[ xO + i ][ yO + j ] ae(v)

}

for( j = 0; j < nCbS; j = j + pbOffset )

for( i = 0; i < nCbS; i = i + pbOffset )

if( dim_not_present_flag[ xO + i ] [ yO + j ] ) {

if( prev_intra_luma_pred_flag[ xO + i ] [ yO + j ] )

mpm_idx[ xO + i ] [ yO + j ] ae(v) else

rem_intra_luma_pred_mode[ xO + i ][ yO + j ] ae(v)

}

if( !sdc_flag[xO][yO] )

intra_chroma_pred_mode[ xO ][ yO ] ae(v)

}

} else {

if( PartMode == PART_2Nx2N)

prediction_unit( xO, yO, nCbS, nCbS )

else if( PartMode = = PART_2NxN ) {

prediction_unit( xO, yO, nCbS, nCbS / 2 )

prediction_unit( xO, yO + ( nCbS / 2 ), nCbS, nCbS / 2 )

} else if( PartMode = = PART_Nx2N ) {

prediction_unit( xO, yO, nCbS / 2, nCbS )

prediction_unit( xO + ( nCbS / 2 ), yO, nCbS / 2, nCbS )

} else if( PartMode = = PART_2NxnU ) {

prediction_unit( xO, yO, nCbS, nCbS / 4 )

prediction_unit( xO, yO + ( nCbS / 4 ), nCbS, nCbS * 3 / 4 )

} else if( PartMode = = PART_2NxnD ) {

prediction_unit( xO, yO, nCbS, nCbS * 3 / 4 ) depth_based_blk_part_flag[ layerld ] equal to 0 specifies that depth based block partitioning is not used for the layer with nuh layer id equal to layerld. depth_based_blk_part_flag[ layerld ] equal to 1 specifies that depth based block partitioning might be used for the layer with nuh layer id equal to layerld. When not present, the value of depth_based_blk_part_flag[ layerld ] is inferred to be equal to 0.

In the current design, when dbbp flag is equal to 1, the partition mode is not decided by the part mode, which originally indentifies the prediction partition of the current inter CU. In such case, the virtual depth block which DBBP gets from depth block will be utilized to determine the final partition among Nx2N and 2NxN.

However, such design produces the redundancy in transmitting part mode or dbbp flag, since dbbp flag does not rely on the part mode.

SUMMARY OF THE INVENTION

It is proposed to reduce the redundancy in transmitting dbbp flag by only transmitting dbbp_flag when the part_mode identifies a 2NxN or Nx2N PU partition, especially when the part mode identifies the partition which DBBP utilizes.

Other aspects and features of the invention will become apparent to those with ordinary skill in the art upon review of the following descriptions of specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

Fig. 1 is a diagram illustrating the suggested encoding and decoder order of part mode and dbbp flag.

Fig. 2 is a diagram illustrating when dbbp flag is transmitted before part mode, if dbbp flag is equal to 1, part mode only identifies two partition patterns for DBBP, Nx2N or 2NxN.

DETAILED DESCRIPTION

The following description is of the best-contemplated mode of carrying out the invention.

This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.

There are kinds of methods proposed for transmitting and specifying the flags of part mode and dbbp flag for DBBP.

In a first embodiment, dbbp flag is still transmitted after part mode but only in the case when the part_mode specifies a 2NxN or Nx2N prediction unit(PU) partition, as shown in Fig.

1.

In a second embodiment, dbbp flag is still transmitted after part mode but only in the case when the part_mode identifies a prediction unit partition belonging to a subset of {2Nx2N, Nx2N, 2NxN, NxN, 2NxnU, 2NxnD, nLx2N and nRx2N}.

In a third embodiment, when dbbp flag is T, the PU partition which the part mode identifies is just the prediction partition which DBBP utilizes.

In a fourth embodiment, the dbbp flag is transmitted before part mode, but part mode is transmitted only when dbbp flag equal to 1. In this case, the prediction partition which DBBP utilizes is derived from virtual depth block.

In a fifth embodiment, when the dbbp flag is transmitted before part mode, the binarization of part mode is different when dbbp flag is equal to 0 and 1.

In a sixth embodiment, when the dbbp flag is transmitted before part mode, if the dbbp flag is equal to 1, the part mode only identifies two partition patterns for DBBP, Nx2N or 2NxN, as shown in Fig. 2. For example, part mode equal to 1 when the partition for DBBP is 2NxN.

In a seventh embodiment, when the dbbp flag is transmitted before part mode, the context utilized for coding part mode is different when dbbp flag is equal to 0 and 1.

In an eighth embodiment, when the dbbp flag is transmitted after part mode, the dbbp flag is signalized in cu extention syntax table, and transmitted only in case of the current prediction mode is not intra and part mode only identifies two partition patterns for DBBP, e.g., Nx2N or 2NxN.

In a ninth embodiment, when the dbbp flag is transmitted after part mode, the dbbp flag is signalized in cu extention syntax table, and transmitted only in case of the current prediction mode is not intra and part_mode does not identify 2Nx2N or NxN PU partition.

In a tenth embodiment, any methods belonging to the first to ninth embodiments are combined together.

The proposed method described above can be used in a video encoder as well as in a video decoder. Embodiments of the method according to the present invention as described above may be implemented in various hardware, software codes, or a combination of both. For example, an embodiment of the present invention can be a circuit integrated into a video compression chip or program codes integrated into video compression software to perform the processing described herein. An embodiment of the present invention may also be program codes to be executed on a Digital Signal Processor (DSP) to perform the processing described herein. The invention may also involve a number of functions to be performed by a computer processor, a digital signal processor, a microprocessor, or field programmable gate array (FPGA). These processors can be configured to perform particular tasks according to the invention, by executing machine-readable software code or firmware code that defines the particular methods embodied by the invention. The software code or firmware codes may be developed in different programming languages and different format or style. The software code may also be compiled for different target platform. However, different code formats, styles and languages of software codes and other means of configuring code to perform the tasks in accordance with the invention will not depart from the spirit and scope of the invention.

The invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described examples are to be considered in all respects only as illustrative and not restrictive. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.