Title:
MOUNTED SUBSTRATE AND ELECTRONIC EQUIPMENT
Document Type and Number:
WIPO Patent Application WO/2007/058096
Kind Code:
A1
Abstract:
To provide a mounted substrate in which a stress applied to a semiconductor package
can be suppressed when the semiconductor package is mounted on a curved substrate.
In a mounted substrate (1) in which a semiconductor package (20) is mounted on
a curved substrate (10) having at least partly a curved surface, the curved substrate
(10) includes a pedestal part (13a) made of an insulating material which is disposed
at the portion of the curved portion thereof where the semiconductor package
(20) is mounted and of which the upper surface is formed flat, and a plurality of
pad parts (15a) disposed on the flat surface of the pedestal part (13a). The semiconductor
package (20) is characterized in that it is mounted on the pad parts (15a).
Inventors:
WATANABE SHINJI (JP)
MIKAMI NOBUHIRO (JP)
SATO JUNYA (JP)
FUJII KENICHIRO (JP)
ABE KATSUMI (JP)
SAWADA ATSUMASA (JP)
MIKAMI NOBUHIRO (JP)
SATO JUNYA (JP)
FUJII KENICHIRO (JP)
ABE KATSUMI (JP)
SAWADA ATSUMASA (JP)
Application Number:
PCT/JP2006/322251
Publication Date:
May 24, 2007
Filing Date:
November 08, 2006
Export Citation:
Assignee:
NEC CORP (JP)
WATANABE SHINJI (JP)
MIKAMI NOBUHIRO (JP)
SATO JUNYA (JP)
FUJII KENICHIRO (JP)
ABE KATSUMI (JP)
SAWADA ATSUMASA (JP)
WATANABE SHINJI (JP)
MIKAMI NOBUHIRO (JP)
SATO JUNYA (JP)
FUJII KENICHIRO (JP)
ABE KATSUMI (JP)
SAWADA ATSUMASA (JP)
International Classes:
H05K1/02; H05K1/18
Foreign References:
| JP2002353595A | 2002-12-06 | |||
| JPH05110255A | 1993-04-30 | |||
| JP2003133693A | 2003-05-09 | |||
| JPH07221433A | 1995-08-18 | |||
| JPH01289186A | 1989-11-21 |
Attorney, Agent or Firm:
KATO, Asamichi (daVinci BOSEI 7th Floor 20-12 Shin-Yokohama 3-chome, Kohoku-k, Yokohama-shi Kanagawa 33, JP)
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