Field of Invention

The present invention relates to a multilayer thermoelectric structure, the method of preparation thereof, and the use thereof. The multilayer thermoelectric structure of the present invention, which may also be referred to herein as a "multilayer thin film", can be used, for example, as a heat recovery system in a Thermoelectric Generator (TEG) which converts heat energy to electric energy, or as a Peltier cooling/heating module which can be used in seat heater, humidity controller, or compact refrigerator.

Background Art

Over the past decade, there has been heightened interest in the field of thermoelectrics, driven by the need for more efficient materials for power generation. A thermoelectric system is an environment-friendly energy conversion technology with the advantages of small size, high stability, no pollutants and feasibility over a wide temperature range. The demand for alternative energy technologies to reduce our dependency on fossil fuels has led to important programs of research in several technical fields.

For example, in the automotive industry, power-generation applications are currently investigated, for example, as a means to develop electrical power from waste engine heat from the radiator and exhaust system for use in next- generation vehicles. In addition, thermoelectric refrigeration applications include seat coolers for comfort and electronic component cooling.

Among different thermoelectric materials, alloys based on the Bi ₂ Te ₃ system [(Bii _-x Sbx)2(Tel _-x Sex)3] and the Sii- _y Ge _y system have been extensively studied and optimized for their use as thermoelectric materials to perform in a variety of solid-state thermoelectric refrigeration and power-generation applications over the past 30 years. Βϊ ₂ Τθ3 in the crystallized state has a layer structure (Figure 1) with rhombohedral-hexagonal symmetry, wherein the layers are stacked along the c- axis (...Tei-Bi-Te ₂ -Bi-Tei...), and wherein the Bi and Te layers are held together by strong covalent bonds, whereas the bonding between adjacent Te layers is of the van der Waals type.

A key goal for thermoelectric research is increasing the material figure- of-merit ZT, which is directly related to the efficiency of the thermal/electrical energy conversion. where S is the Seebeck coefficient, G is the electrical conductance, T is the temperature and Ke/i is the electronic/lattice thermal conductance.

J. Maassen and M. Lundstorm disclose, in the non-patent literature [1], that in a computer-simulated Bi ₂ Te ₃ system, a 1 quintiple layer-thickness (i.e. Tei-Bi-Te ₂ -Bi-Tei) is a superior thermoelectric compared to bulk Bi ₂ Te3.

However, when a thermoelectric material is used for example in a thermoelectric module, superconducting cable, secondary battery or nonlinear optical device, it is desirable that the thickness of the thermoelectric layer is more than 100 μητι, in order to obtain low electric resistance in the case of thermoelectric module.

It is possible to obtain a desired crystalline orientation and thickness by using a single crystal as substrate, as disclosed in non-patent literature [2], wherein the substrate can be for example, a single crystal of Si, quartz, ZnO, KCI, BaF ₂ , MgO.

However, such a method is not appropriate for industrial scale production.

Venkatasubramanian et al. disclose, in a non-patent literature [2], a single crystal substrate, which gives a good TE performance, but which is not appropriate for mass production on an industrial scale. A "2D nano-sheet" is a multilayered structure consisting of several unit layers, said unit layers are separated from one another by Van der Waals gaps and wherein the thickness is less than 1 Mm. In case of using a 2D nano-sheet, it would be necessary to stack several 2D nano-sheets to achieve the desirable thickness of more than 100 μιη, even though a 2D nano-sheet generally has a good thermoelectric property. However, simple stacking of the 2D material creates bonding interaction between adjacent layers, since it is difficult to keep crystalline orientation, resulting in the stacked 2D nano-sheet becoming a usual bulk material, and not a 2D nano-sheet, thus losing the thermoelectric properties of a 2D nano-sheet.

Non-Patent Literature References

[1] J. Maassen and M. Lundstorm: Appl. Phys. Lett., Vol. 102, 093103 (2013).

[2] E. Venkatasubramanian, E. Siivola, T. Colpitis and B. O'Quinn: Nature 413, 597-602 (2001).

Therefore, there is a continuous need for a thermoelectric material/structure with high energy conversion efficiency, having a sufficient thickness, and which can be produced on an industrial scale.

Summary of the Invention

The present invention relates to a multilayer thermoelectric structure comprising a plurality of alternated layers of:

(A): crystalline thermoelectric material; and

(B): a material of separation which is a material different from (A);

wherein at least one of the two end layers is a layer of (B); and wherein the crystalline thermoelectric material (A) is selected from the group consisting of: Bi ₂ Te ₃ , GaTe, Bi ₂ S ₃ , Bi ₂ Se ₃ , MoS ₂ , TiS ₃ , TiSe ₃ , TiTe ₃ , MnPS ₃ , CdPS ₃ , CdPS ₃ , NiPS _3/ ZnPS ₃ , Mno.5Feo.5PS3, GaS, GaSe, InS, InSe, InTe, TiS ₂ , MnS, MnTe, ZnS, ZnSe, GaSb, GeSb, GeTe, CdS, CdSe, CdTe, In ₂ S ₃ , In ₂ Se ₃ , InSb, Sb ₂ Te ₃ , and Ge ₂ Sb ₂ Te ₅ .

The present invention also relates to a use of the multilayer thermoelectric structure, in a thermoelectric module, superconducting cable, secondary battery or nonlinear optical device.

Brief Description of the Figures

Figure 1 is a schematic representation of the crystalline structure of

Bi ₂ Te ₃ .

Figures 2 and 3 (a)-(c) are schematic representations of a non-limiting illustrative multilayer thermoelectric structure of the present invention.

Figures 4 to 9 are X-ray diffraction patterns of the multilayer thermoelectric materials of Examples, Reference Example and Comparative Examples.

Figure 10 (a) is a Transmission Electron Microscopy (TEM) image of the multilayer thermoelectric material of Example 1.

Figure 10 (b) is an enlarged view of the Bi ₂ Te ₃ layer of Figure 9 (a).

Figure 11 presents an example of a thermoelectric device in which a multilayer thermoelectric structure of the present invention is used.

Detailed Description of the Invention <Deflnition>

The term "thermoelectric material", as used herein, refers to a semiconductor which can convert heat to electricity and electricity to heat, this definition comprising not only well-known inorganic materials such as Bi ₂ Te ₃ , but also polymer materials.

The term "amorphous", as used herein, refers to having no real or apparent crystalline form. The term "unit layer" as used herein, refers to a composite layer consisting of several atomic layers, separated from adjacent unit layers on both sides respectively by a Van der Waals gap.

C-planes are represented with (001), which is perpendicular to c-axis [001] of the crystal, i.e. (001) planes are stacking in parallel to the stacking direction of the multilayer thermoelectric structure, and in other words, (001) planes are in parallel to the separating layer. They can be detected by diffraction technique, such as XRD or Electron Diffraction with TEM. With XRD, a c-plane growth can be identified from (001) reflections e.g. (006). Those crystals which are not c-plane oriented, give other reflections, e.g. (015). Preferred c-plane growth can be defined with the following condition: the peak intensity ratio of (006)/(015) is greater than 1, when the diffraction plane is perpendicular to the stacking direction of the multilayer thermoelectric structure.

The stacking direction, as used herein, corresponds to the direction perpendicular to the plane of a multilayer thermoelectric structure.

In the case of the crystalline layers of advantageous embodiment of the present invention, c-planes are parallel to the unit layer, divided by Van der Waals gaps. The electron or holes can be transported much faster in the c- plane than across the c-planes.

<Multilaver thermoelectric structure>

The present invention relates to a multilayer thermoelectric structure comprising a plurality of alternated layers of:

(A): crystalline thermoelectric material; and

(B): a material of separation which is a material different from (A);

wherein at least one of the two end layers is a layer of (B); and

wherein the crystalline thermoelectric material (B) is selected from the group consisting of: Bi ₂ Te3, GaTe, Bi ₂ S ₃ , Bi ₂ Se ₃ , MoS ₂ , TiS ₃ , TiSe ₃ , TiTe ₃ , MnPS ₃ , CdPS ₃ , CdPS ₃ , NiPS ₃ , ZnPS ₃ , Mno.5Feo.5PS3, GaS, GaSe, InS, InSe, InTe, TiS ₂ , MnS, MnTe, ZnS, ZnSe, GaSb, GeSb, GeTe, CdS, CdSe, CdTe, In ₂ S ₃ , In ₂ Se ₃ , InSb, Sb ₂ Te ₃ , and Ge ₂ Sb ₂ Te ₅ . (A) Thermoelectric material

The thermoelectric material used herein can be a thermoelectric material, chosen among Bi ₂ Te3, Bi ₂ S ₃ , Bi ₂ Se ₃ , transition metal dichalcogenides such as MoS ₂ , transition metal trichalcogenides such as T1S3, TiSe ₃ , TiTe ₃ , Metal phosphorus trichalcogenides such as MnP≤3, CdPS ₃ , CdPS3, N1PS3, ZnPS3, Mno.5Feo.5PS3, III-VI layered semiconductor such as GaS, GaSe, GaTe, InS, InSe, and InTe. Alternatively, it is possible to use TiS ₂ , MnS, MnTe, ZnSe, GaSb, GeSb, GeTe, CdS, CdSe, CdTe, In ₂ S ₃ , In ₂ Se ₃ , InSb, and Sb ₂ Te ₃ , Ge ₂ Sb ₂ Te ₅ as the thermoelectric material in the present invention. The thermoelectric material used herein is not particularly limited, but preferably is selected taking into consideration the reactivity with the layer of separation.

Preferably, the thermoelectric material used in the present invention is Bi ₂ Te3 or GeTe. Most preferably, the thermoelectric material used in the present invention is Bi ₂ Te ₃ .

Possible precursors used for depositing by ALD (atomic layer deposition) a layer of thermoelectric material can be, for example, B1CI3 and (Et3Si) ₂ Te or (Me ₃ Si) ₂ Te for Bi ₂ Te ₃ .

Possible precursors for depositing other thermoelectric materials are listed in Table 1. Table 1: Examples of possible precursors for depositing thermoelectric material

The thickness of one layer is advantageously be chosen from the performance point of view.

The minimum thickness of thermoelectric material layer is preferably half the thickness of one unit layer, and preferably the thickness of one unit layer.

The maximum thickness of thermoelectric material layer is preferably 20 times of the thickness of a unit layer, and preferably 3 times the thickness of one unit layer.

Preferably, the thickness of thermoelectric material is half the thickness of one unit layer or more, and 20 times of the thickness of a unit layer or less.

Still more preferably, the thickness of the thermoelectric material is the thickness of one unit layer or more, and 3 times the thickness of a unit layer or less. When the thickness is in the above-mentioned ranges, higher carrier mobility and low lattice thermal conductivity can be obtained, resulting in a higher ZT value.

Preferably, for layers of thermoelectric material in the invention, and for example, in the case of Bi ₂ Te ₃ , the thickness of thermoelectric material layer is at least 0.5 nm and at most 50 nm, preferably of at least 0.5 nm and at most 30 nm, more preferably at least 0.5 nm and at most 20 nm, and most preferably, at least 1 nm and at most 10 nm, in order to have a higher ZT value. (B) Material of separation

The layer of separation used herein can be of any material different from the thermoelectric material used for (A). An appropriate material can be, for example, a solid organic material, a solid polymer and an amorphous inorganic material.

The said solid organic material can be, for example, pentacene.

The said solid polymer can be, for example, polyimide, poly(p-phenylene terephthalamide), polyimide-amide and PET.

The said amorphous inorganic material can be, for example, MgO, Al ₂ 0 ₃ , Si0 ₂ , CaF ₂ , Ti0 ₂ , Y ₂ 0 ₃ , Zr0 ₂ , and Sb ₂ 0 ₅ .

Preferably, the layer of separation is made of a solid organic material, a solid polymer and an amorphous inorganic material, since these materials reduce more effectively the interaction between thermoelectric material layers, thus enhancing thermoelectric performance.

Still more preferably, the layer of separation is made of Al ₂ 0 ₃ or polyimide.

Possible precursors used for depositing a layer of Al ₂ 0 ₃ can be, for example, Me ₃ AI and H ₂ 0, or 0 ₂ or 0 ₃ .

Possible precursors used for depositing a layer of polyimide can be, for example, DAH(diaminohexane) and PMDA (pyromellitic dianhydride). Possible examples of precursors for other materials of separation are indicated in Table 2.

Table 2: Examples of possible precursors for depositing a layer of separation

The thickness of the layer of separation is at least 1 nm and at most 100 nm, preferably at least 2 nm and at most 50 nm, more preferably at least 4 nm and at most 20 nm, and most preferably at least 4 nm and at most 10 nm. When the thickness of a layer of separation is in the above-mentioned range, the layer of separation keeps each 2D nano sheet isolated, resulting in a high ZT value. (O Substrate

The multilayer thermoelectric structure of the present invention optionally comprises a substrate.

The substrate is not particularly limited and can be made of any material suitable for depositing thermoelectric material. An appropriate substrate can be, for example, single crystal Si, quartz, natural oxidized Si, a single crystal of Si, soda lime glass, SiO^Si, ZnO, KCI, BaF ₂ , MgO, polyethyleneterephthalate (PET) or a mask for photo lithography.

Preferably, the substrate is Si0 ₂ /Si substrate. Structure

The multilayer thermoelectric structure of the present invention comprises a plurality of alternated layers of (A) and (B), wherein at least one of the two end layers is a layer of (B).

Here, the term "alternated" means that none of two adjacent layers are of the same type, i.e. two layers of (A) or two layers of (B) are never adjacent in the multilayer structure of the present invention.

Here, the term "end layers" means the uppermost and the lowermost layers of the multilayer structure in the direction of stacking, which have one of its surfaces not in contact with a surface of its adjacent layer. The end layers are indicated by arrows in Figures 2.

In the present invention, any one of the above-mentioned thermoelectric materials (A) can be combined with any one of the above-mentioned materials of separation (B), and the preferred thickness ranges indicated above for thermoelectric materials (A) are applicable to any one of the above-mentioned thermoelectric materials, and the preferred thickness ranges indicated above for materials of separation (A) are applicable to any one of the above-mentioned material of separation: any one of the above-mentioned thermoelectric materials (A) having a length falling within any one of the above-mentioned preferred thickness ranges for thermoelectric material (A) can be used in combination with any of the above-mentioned materials of separation (B) having a length falling within any of the above-mentioned preferred thickness ranges for materials of separation (B).

Figures 3 (a)-(c) are schematic presentations of some examples of multilayer thermoelectric structures of the present invention.

In Figure 3 (a), a undercoat layer consisting of an amorphous separating material (20 is deposited on a substrate (1), and 2 sets of layers consisting of a layer of separation made of the same amorphous material (2) and a layer of thermoelectric material (3) are deposited on the undercoat layer (2 - In Figure 3 (b), 2 sets of layers consisting of an amorphous layer of separation (2) and a layer of thermoelectric material (3) are deposited directly on the substrate (1).

In Figure 3 (c), a undercoat layer consisting of an amorphous material (2 is deposited on a substrate (1), and 5 sets of layers consisting of a layer of separation made of the same amorphous material (2) and a layer of thermoelectric material (3) are deposited on the undercoat layer (20.

As long as the c-plane growth can be maintained, the thickness of the layer of separation is preferably thinner, i.e. the thickness ratio of a thermoelectric layer to a layer of separation (i.e. the thickness of a layer of thermoelectric material: thickness of a layer of separation) is preferably 70% : 30% or more, more preferably 80% : 20% or more, and most preferably 90% : 10% or more.

With the multilayer structure of the present invention, it is possible to achieve a thickness of more than 100 μιη desired for industrial applications for example in a thermoelectric module, superconducting cable, secondary battery or nonlinear optical device, without losing the thermoelectricity of the 2D nano- sheet.

Here, the stacking of alternated layers may be achieved by a depositing process as explained below, such that two adjacent layers are bonded, and not simply placed on top of one another without any interaction between them.

When the multilayer thermoelectric structure of the present invention is used, it is preferably the layer of separation that is exposed to the outside.

The optional substrate layer can be removed before use.

Number of layers

The number of layers is not particularly limited. The thickness of one layer of separation and of thermoelectric material may appropriately be chosen from the performance point of view.

< Method for preparing the thermoelectric material >

The present invention also relates to a method for preparing the thermoelectric material, comprising the steps of:

1) providing a substrate;

2) depositing a layer of thermoelectric material on a substrate; and

3) depositing a layer of separation on the thermoelectric layer deposited in step 2);

wherein steps 2) and 3) are carried out at least once, and

4) optionally removing the substrate.

1) Preparing a substrate

The first step of the method for preparing the multilayer thermoelectric material consists in preparing a substrate. The substrate is not particularly limited, and for example, single crystal Si, quartz, natural oxidized Si, a single crystal of Si, soda lime glass, SiO^Si, ZnO, KCI, BaF ₂ , MgO, polyethyleneterephthalate (PET) or a mask for photo lithography can be used.

When a substrate having a very flat substrate is used, a layer of thermoelectric material obtained may have a smoother surface, and higher mobility.

2) Depositing a layer of thermoelectric material on the substrate

The second step of the method consists in depositing a thermoelectric layer. Any method can be used for depositing a first thermoelectric layer, for example, atomic layer deposition (ALD), Metalorganic Chemical Vapour Deposition (MOCVD) or sputtering.

The thickness of the layer can be controlled, in the first place, by adjusting the number of deposition cycles, in the case of ALD. The thickness can also be controlled, for example by, adjusting the feeding time of the precursors, the purge times and the substrate temperature, in the case of ALD.

Possible precursors used for depositing a layer of Bi ₂ Te3 can be, for example, BiCI ₃ and (Et ₃ Si) ₂ Te or (Me ₃ Si) ₂ Te.

Possible precursors for depositing other thermoelectric materials are listed in Table 1 above.

3) Depositing a layer of separation on the thermoelectric layer deposited in step 2)

The third step of the method consists in depositing a layer of separation. Any method can be used for depositing a thermoelectric layer, for example, atomic layer deposition, MOCVD or sputtering.

The thickness of the layer can be controlled, in the first place, by adjusting the number of deposition cycles, in the case of ALD. The thickness can also be controlled, for example by, adjusting the feeding time of the precursors, the purge times and the substrate temperature, in the case of ALD. Possible precursor used for depositing a layer of AI2O3 can be, for example, Me ₃ AI and H ₂ 0, or 0 ₂ or O3.

Possible precursor used for depositing a layer of polyimide can be, for example, DAH(diaminohexane) and PMDA (pyromellitic dianhydride).

Possible precursors for depositing other thermoelectric materials are listed in Table 2 above.

Steps 2) and 3) are repeated several times for obtaining a thicker multilayer structure. Preferably, steps 2) and 3) are repeated 3 times or more, and more preferably 5 times or more.

Here, the number of cycles corresponds to the number of repeating units of layers.

4) Removing the substrate

Optionally, the substrate is removed before use.

<Use of the thermoelectric materia I >

The multilayer thermoelectric structure of the present invention can be used, for example, in a thermoelectric module, superconducting cable, secondary battery and nonlinear optical device. The multilayer thermoelectric structure of the present invention can also be used, for example, as a heat recovery system in a Thermoelectric Generator (TEG) which converts heat energy to electric energy, or as a Peltier cooling/heating module which can be used in a seat heater, humidity controller, or compact refrigerator.

Figure 11 presents an example of a thermoelectric device in which the multilayer thermoelectric structure of the present invention is used.

When the multilayer thermoelectric structure of the present invention is used for example in a thermoelectric module, superconducting cable, secondary battery or nonlinear optical device, it is possible to achieve a thermoelectric layer thickness of more than 100 pm, without losing the thermoelectric property of a 2D nano-sheet.

The semiconductor substance may appropriately be included more than 50 vol% in the material which is used in the thermoelectric module. In the case of automobile application, the working temperature is limited only between -40 °C and 1000 °C.

Examples

In the following Examples, the thin films were deposited in a flow type ALD reactor, using nitrogen as the carrier and purge gas with the operating pressure below lOmbar. 5 x 5 cm ² , and native Si0 ₂ /Si or soda-lime glass were used as substrates.

< Deposition condition >

The following deposition condition was used:

Polyamide amorphous layer

A polyamide amorphous layer was deposited under the deposition condition of 2/3/2.5/3s for DAH/purge/PMDA/purge with 35°C and 150°C of evaporation temperature of DAH (1,6-diaminohexane) and PMDA (1,2,3,5- benzenetetracarboxylic anhydride), respectively.

Bi ₂ Te ₃ layer

A Bi ₂ Te ₃ layer was deposited by evaporating the precursors, i.e. BiCI ₃ and (Et ₃ Si) ₂ Te, from open glass vessels inside the reactor at 140°C and 43°C, respectively, and by pulsing with inert gas valving. The pulse duration was 0.5/2/2/2s for BiCI ₃ /purge/(Et ₃ Si) ₂ Te/purge. The substrate temperature was Al ₂ 0 ₃ amorphous layer

For AI2O3, 0.5/l/l/2s of Me ₃ AI/purge/H ₂ 0/purge. The precursors were evaporated at room temperature. Example 1

A multilayer structure comprising a polyimide undercoat layer and five Bi ₂ Te ₃ layers each separated by an amorphous polyimide layer deposited on a native SiC Si substrate was prepared in the following manner.

The native SiO^Si is a single crystal Si, wherein the the surface is naturally oxidized to Si0 ₂ .

1) An amorphous polyimide undercoat layer of 6 nm was deposited on a native SiO^Si substrate.

2) A Bi ₂ Te ₃ layer of 14 nm was deposited on the amorphous polyimide undercoat layer deposited in step 1).

3) An amorphous polyimide layer of 6 nm was deposited on the Bi ₂ Te ₃ layer deposited in step 2).

4) Steps 2) and 3) were repeated five times to form a multilayer structure. Reference Example 1

A multilayer structure comprising a Bi ₂ Te ₃ layer and an amorphous polyimide layer deposited on a native SiO^Si substrate was prepared in the following manner. 1) A Bi ₂ Te ₃ layer of 6.5 nm was deposited on a native SiC Si substrate.

2) An amorphous polyimide layer of 100 nm was deposited on the Bi ₂ Te ₃ layer deposited in step 1). Comparative Example 1

A multilayer structure comprising a polyamide undercoat layer and a Bi ₂ Te ₃ deposited on a native Si0 ₂ /Si substrate was prepared in the following manner.

1) An amorphous polyimide undercoat layer of 6 nm was deposited on a native Si0 ₂ /Si substrate.

2) A Bi ₂ Te ₃ layer of 65 nm was deposited on the amorphous polyimide undercoat deposited in step 1).

Example 2

A multilayer structure comprising a polyamide undercoat layer and two Bi ₂ Te ₃ layers each separated by an amorphous Al ₂ 0 ₃ layer deposited on a native Si0 ₂ /Si substrate was prepared in the following manner.

1) An amorphous Al ₂ 0 ₃ undercoat layer of 6 nm was deposited on a native SiO^Si substrate.

2) A Bi ₂ Te ₃ layer of 14 nm was deposited on the amorphous Al ₂ 0 ₃ undercoat layer deposited in step 1).

3) An amorphous Al ₂ 0 ₃ layer of 6 nm was deposited on the Bi ₂ Te ₃ layer deposited in step 2).

4) Steps 2) and 3) were repeated two times to form a multilayer structure.

Example 3

A multilayer structure comprising a Bi ₂ Te ₃ layer and an amorphous Al ₂ 0 ₃ layer deposited on a native SiO^Si substrate was prepared in the following manner.

1) A Bi ₂ Te ₃ layer of 14 nm was deposited on a native SiO^Si substrate. 1

2) An amorphous Al ₂ 0 ₃ layer of 6 nm was deposited on the Bi ₂ Te ₃ layer deposited in step 1).

3) Steps 2) and 3) were repeated two times to form a multilayer structure. Comparative Example 2

A multilayer structure comprising an ΑΙ ₂ 0 ₃ undercoat layer and a Bi ₂ Te ₃ layer deposited on a native Si0 ₂ /Si substrate was prepared in the following manner. 1) An amorphous Al ₂ 0 ₃ undercoat layer of 6 nm was deposited on a native Si0 ₂ /Si substrate.

3) A Bi ₂ Te ₃ layer of 130 nm was deposited on the amorphous polyamide undercoat deposited in step 1). The structure of Examples 1 to 4 and Comparative Examples 1 and 2 are summarized in Table 3.

substrate undercoat (nm) PI/AO (nm) BT (nm) cycle configuration (nm) c-plane

Example 1 SiO ₂ /Si PI 6 PI 6 14 5 {5x(6/14)}6/SiO ₂ /Si Yes

Reference Example 1 SiO ₂ /Si - - PI 100 6.5 1 (100/6.5)/SiO ₂ /Si Yes

Comparative Example 1 SiO ₂ /Si PI 6 - 65 1 (65)6/SiO ₂ /Si No

Example 2 SiO ₂ /Si AO 6 AO 6 14 2 {2x(6/14)}6/SiO ₂ /Si Yes

Example 3 SiO ₂ /Si - - AO 6 14 2 {2x(6/14)}/SiO ₂ /Si Yes

Comparative Example 2 SiO ₂ /Si AO 6 - - 130 1 (130)6/SiO ₂ /Si No

PI: polyimide, AO: AI ₂ O ₃ , BT: Bi ₂ Te ₃

Table 3: multilayer thermoelectric structures of Examples

1

< Identification of c-plane growth>

Preferred c-plane orientation of the Samples prepared according to Examples 1 to 3, Reference Example 1 and to Comparative Examples 1 and 2 was identified by using X-ray diffraction (XRD) wherein the diffraction plane is perpendicular to the stacking direction of the multilayer thermoelectric structure, i.e. (001) planes are stacking in perpendicular to the stacking direction of the multilayer thermoelectric structure, and in other words, (001) planes are in parallel to the separating layer. Preferred c-plane orientation is observed from the intensities of (OOI)-peaks [(003), (006), (0015) and (0018)] relative to e.g. (015)-peak: the higher the ratio of (001) to (015), the stronger the c-plane orientation.

A c-plane growth can be identified by using XRD when the following condition is satisfied: the peak intensity ratio of (006)/(015) is greater than 1, when the diffraction plane is perpendicular to the stacking direction of the multilayer thermoelectric structure.

In cases where it is difficult to apply XRD for the sample due e.g. to small sample size, Electron Diffraction is also applicable.

<Application>

Figure 11 presents an example of a thermoelectric device in which the multilayer thermoelectric structure of the present invention is used.