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Title:
NON-VOLATILE MEMORY CELL, NON-VOLATILE MEMORY CELL ARRAY, AND METHOD FOR WRITING INFORMATION TO NON-VOLATILE MEMORY CELL ARRAY
Document Type and Number:
WIPO Patent Application WO/2021/014810
Kind Code:
A1
Abstract:
This non-volatile memory cell is configured of a non-volatile memory element 50 of a variable resistance type and a transistor TR for selection, wherein one terminal of the non-volatile memory element 50 is connected to one source/drain region 15A of the transistor TR for selection, and is connected to a write line WR, and another source/drain region 15B of the transistor TR for selection is connected to a selection line SL. The other terminal of the non-volatile memory element 50 is connected to a bit line BL.

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Inventors:
YOKOYAMA TAKASHI (JP)
OKA MIKIO (JP)
KANDA YASUO (JP)
Application Number:
PCT/JP2020/023048
Publication Date:
January 28, 2021
Filing Date:
June 11, 2020
Export Citation:
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Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L27/105; H01L21/8239; H01L29/82; H01L43/08; H01L45/00; H01L49/00
Domestic Patent References:
WO2018037777A12018-03-01
Foreign References:
JP2017199443A2017-11-02
JP2007123512A2007-05-17
JP2012019105A2012-01-26
Attorney, Agent or Firm:
YAMAMOTO Takahisa et al. (JP)
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