Title:
NON-VOLATILE MEMORY AND METHOD OF FORMING THEREOF
Document Type and Number:
WIPO Patent Application WO2003054965
Kind Code:
A3
Abstract:
A semiconductor device includes a non-volatile memory, such as an electrically erasable programmable read only memory (EEPROM) array (30) of memory cells (311-316, 331-336). The non-volatile memory is arranged as an array (30) of cells in rows and columns (311-316, 331-336). Each column of the array (311-316, ... 331-336) is located within an isolated well (301-303), common to the cells in the column but isolated from other wells of other columns. The array is programmed by pulsing potentials to each column, with isolation of results for each column. In one embodiment, the memory cells are devoid of floating gate devices and use a non-conductive charge storage layer to store charges. In another embodiment, the memory cells store charges in nanocrystals.
Inventors:
CAVINS CRAIG A
CHANG KO-MIN
CHANG KO-MIN
Application Number:
PCT/US2002/039923
Publication Date:
March 04, 2004
Filing Date:
December 12, 2002
Export Citation:
Assignee:
MOTOROLA INC (US)
International Classes:
G11C16/04; H01L21/8246; H01L21/8247; H01L27/115; H01L29/788; H01L29/792; (IPC1-7): H01L27/115; H01L21/8246; G11C16/04; H01L21/8247
Domestic Patent References:
| WO2002015190A2 | 2002-02-21 |
Foreign References:
| DE19823733A1 | 1999-12-02 | |||
| US5994732A | 1999-11-30 |
Other References:
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 09 30 September 1996 (1996-09-30)
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