Title:
NONVOLATILE MEMORY, STORAGE DEVICE, AND METHOD FOR CONTROLLING NONVOLATILE MEMORY
Document Type and Number:
WIPO Patent Application WO/2023/181624
Kind Code:
A1
Abstract:
The present invention reduces power consumption of a nonvolatile memory employing a resistance change element. In a memory cell array, a predetermined number of memory cells each including a resistance change element and a switching element connected in series are arrayed. A selection unit selects, from the predetermined number of memory cells, a memory cell to be accessed. A voltage supply unit supplies a predetermined reset voltage to the selected memory cell when the resistance change element in the selected memory cell is to be transitioned from a low resistance state in which a resistance value is lower than a predetermined value to a high resistance state in which a resistance value is higher than the predetermined value. During a period in which the reset voltage is supplied to the selected memory cell, a current control unit oscillates the current flowing in the memory cell.
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Inventors:
SHIMUTA MASAYUKI (JP)
MORI HIRONOBU (JP)
SHIIMOTO TSUNENORI (JP)
MORI HIRONOBU (JP)
SHIIMOTO TSUNENORI (JP)
Application Number:
PCT/JP2023/002367
Publication Date:
September 28, 2023
Filing Date:
January 26, 2023
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
G11C13/00
Domestic Patent References:
| WO2021256197A1 | 2021-12-23 |
Foreign References:
| JP2021197199A | 2021-12-27 |
Attorney, Agent or Firm:
MARUSHIMA, Toshikazu (JP)
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