Title:
PAGE BUFFER CIRCUITS IN THREE-DIMENSIONAL MEMORY DEVICES
Document Type and Number:
WIPO Patent Application WO/2023/272471
Kind Code:
A1
Abstract:
Page buffer circuits of 3D NAND devices, and the page buffer circuit comprises a first bit line segment sensing branch (630) connected to a first bit line segment of a bit line, and a second bit line segment sensing branch (640) connected to a second bit line segment of the bit line. The first bit line segment sensing branch (630) and the second bit line segment sensing branch (640) are parallel connected to a sensing node of the page buffer circuit. The first bit line segment sensing branch (630) comprises a first sense latch (633) and a first bit line pre-charge path (631), and the second bit line segment sensing branch (640) comprises a second sense latch (643) and a second bit line pre-charge path (641).
Inventors:
CHEN TENG (CN)
WANG YAN (CN)
KURIYAMA MASAO (CN)
WANG YAN (CN)
KURIYAMA MASAO (CN)
Application Number:
PCT/CN2021/102988
Publication Date:
January 05, 2023
Filing Date:
June 29, 2021
Export Citation:
Assignee:
YANGTZE MEMORY TECH CO LTD (CN)
International Classes:
G11C7/10; G11C16/04; G11C16/24
Foreign References:
| CN108091365A | 2018-05-29 | |||
| US20210090620A1 | 2021-03-25 | |||
| US20160093388A1 | 2016-03-31 | |||
| US10984877B1 | 2021-04-20 | |||
| US20120008416A1 | 2012-01-12 |
Attorney, Agent or Firm:
NTD UNIVATION INTELLECTUAL PROPERTY AGENCY LTD. (CN)
Download PDF:
Previous Patent: PAGE BUFFER CIRCUITS IN THREE-DIMENSIONAL MEMORY DEVICES
Next Patent: IBUPROFEN ESTER DERIVATIVE AND EMULSION FORMULATION THEREOF
Next Patent: IBUPROFEN ESTER DERIVATIVE AND EMULSION FORMULATION THEREOF