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Title:
PERC BATTERY STRUCTURE HAVING ANTI-PID PERFORMANCE AND PREPARATION METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2019/148535
Kind Code:
A1
Abstract:
Disclosed by the present invention are a PowerEdge RAID Controller (PERC) battery structure having anti-potential induced degradation (PID) performance, comprising a silicon substrate; a front surface of the silicon substrate is sequentially provided with a silicon dioxide layer and a front surface silicon nitride layer, while a reverse surface of the silicon substrate is sequentially provided with a back surface aluminum oxide layer and a back surface silicon nitride layer; a front surface aluminum oxide layer is disposed between the silicon dioxide layer and the front surface silicon nitride layer, and the front surface aluminum oxide layer has a thickness of 4±0.5 nm; the silicon dioxide layer has a thickness of 2±0.5 nm, the front surface silicon nitride layer has a thickness of 80±9 nm, the back surface aluminum oxide layer has thickness of 4±0.5 nm, and the back surface silicon nitride layer has a thickness of 130±10nm. Further disclosed by the present invention is a method for preparing a PERC battery structure having anti-PID performance. The battery structure of the present invention is provided with a front surface aluminum oxide film layer, and the battery structure has stronger anti-PID performance by means of the reasonably designed thickness of a front surface aluminum oxide film layer and other film layers, being very effective and being worthy of promoting.

Inventors:
WU JUNMIN (CN)
ZHANG PENG (CN)
CHANG QING (CN)
XIE YAOHUI (CN)
YU BO (CN)
Application Number:
PCT/CN2018/075970
Publication Date:
August 08, 2019
Filing Date:
February 09, 2018
Export Citation:
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Assignee:
TONGWEI SOLAR ENERGY ANHUI CO LTD (CN)
International Classes:
H01L31/0216; H01L31/18
Foreign References:
CN106992229A2017-07-28
CN102157570A2011-08-17
CN105845775A2016-08-10
Attorney, Agent or Firm:
KUNMING HEZHONG ZHIXIN INTELLECTUAL PROPERTY OFFICE (CN)
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