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Patent Searching and Data


Title:
PHOTODETECTORS
Document Type and Number:
WIPO Patent Application WO/1983/003708
Kind Code:
A1
Abstract:
A photodetector providing low noise electrical amplification of the light signal detected comprising a photodiode stage which comprises a silicide layer (12) forming a Schottky-barrier junction with a silicon substrate (11) and which is integrated with an amplification stage which uses a silicon transistor (13, 14, 19) adapted to amplify the photovoltaic voltage derived by the photodiode stage. In a preferred embodiment, the silicide layer forms the grid of a permeable base transistor.

Inventors:
HARRISON THOMAS RAY (US)
TIEN PING KING (US)
Application Number:
PCT/US1983/000261
Publication Date:
October 27, 1983
Filing Date:
February 25, 1983
Export Citation:
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Assignee:
WESTERN ELECTRIC CO (US)
International Classes:
H01L27/14; H01L27/144; H01L27/146; H01L29/772; H01L31/10; H01L31/108; (IPC1-7): H01J40/14
Foreign References:
US4350993A1982-09-21
US4200473A1980-04-29
US4137543A1979-01-30
US4358782A1982-11-09
US4242695A1980-12-30
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Claims:
Claims
1. A photodetector characterized as comprising photovoltaic stage integrated with an amplification stag in which the photovoltaic stage comprises an electricall conductive (12) layer, a portion of which forms a Schott barrier junction with a portion of a body (11) of semiconductor material for developing a photovoltaic voltage therebetween, and the amplification stage compris a portion (13, 14, 19) of the body adapted to amplify the photovoltaic voltage developed by the photovoltaic stage.
2. A photodetector in accordance with claim 1 i which the amplification stage comprises a permeable base transistor and a portion of the conductive layer serves a the permeable base.
3. A photodetector in accordance with claim 1 i which the amplification stage is a fieldeffect transisto and the photovoltaic voltage is coupled (43) to the gate electrode (51) of the fieldeffect transistor.
4. A photodetector in accordance with claims 1, or 3 in which the conductive layer is a silicide.
Description:
- 1 -

PHOTODETECTORS

Technical Field

This invention relates to photodetectors. 5 Background of the Invention

It is known to provide photodetectors comprisin a silicide layer contacting a silicon wafer, the interfac therebetween providing a Schottky-barrier diode. See, fo example, the article by E. S. Kohn, entitled "A Charge- 10 Coupled Infrared Imaging Array with Schottky-Barrier

Detectors" appearing in the IEEE Journal of Solid-State Circuits, Vol. SC-11, No. 1, February 1976, pp. 139-146. When such a diode is biased in reverse and infrared light is made incident on the semiconductor for passage

15 therethrough and absorption in the layer, it can act as a photodetector. Carriers formed in the silicide layer by the absorption of the infrared are photoexcited over the barrier from the silicide into the silicon where they become majority carriers and form a photocurrent.

20 One application for photodetection is for use in optical transmission systems where the optical pulses transmitted need to be detected and converted to electrica signals. In such applications it is usually necessary to amplify the electrical signal after detection.

' 25 However, because of the low level of the detection signals in such known silicide Schottky-barrier detectors, it is important for transmission applications that the amplification be done without adding significant noise.

30 Summary

In accordance with our invention, amplification is achieved by integrating a photodiode stage monolithically with an amplifier stage to achieve a high signal-to-noise ratio at the output of the integrated

35 circuit.

Brief Description of the Drawing

FIGS. 1-4 show, in cross section, different embodiments of the invention. Detailed Description With reference now to the drawing, a phototransistor 10 shown in FIG. 1 comprises a body 11 of semiconductor material, e.g., monocrystalline silicon, which provides the main structural support for the phototransistor. The support 11 is typically 0.5 mm thick and its bulk portion is doped lightly n-type.

Within the crystal body is a permeable grid formed by a discontinuous silicide layer 12, typically Pd2 S i r NiSi2, or Pts *' which divides a portion of the silicon body into a collector portion 13 and an emitter portion 14 of a transistor. A metal electrode 15, typically of aluminum, serves as an electrical contact to solid portion of the layer 12. Metal electrodes 16 and 17 also typically of aluminum, serve as electrical contacts t the emitter portion 14 and collector portions 13 of the silicon body. A layer 18 of a suitable dielectric, typically silicon dioxide, is used to isolate electrically the various electrodes. In this embodiment, electrodes 15 16 and 17 are all on a common surface opposite to the surface which is adapted to be- irradiated with the inciden light to be detected.

In operation, the light is made incident on the silicon body to pass through for absorption in the silicid layer, particularly in the region where the permeable grid separates the body into the emitter and collector portions Advantageously, to concentrate the applied electric field to the region of the body in the region of the grid to promote avalanche multiplication of the carriers photogenerated there, the body is diffused or implanted with donor ions at the surface regions of the emitter and collector portions enclosed by the broken line, leaving lightly doped the intermediate portion 19 surrounding the permeable grid.

The permeable base contact 15 is maintained at negative potential with respect to the emitter contact 16 whereby a reverse bias is developed at the Schottky-barri junction which the silicide layer 12 makes with the silic body. Similarly, the collector contact 17 is maintained a positive potential with respect to the emitter contact to develop therebetween a transistor current flow which i modulated by the photovoltaic voltage developed on the permeable base as a result of the absorption of light by the silicide layer. Such modulation of the current flow provides amplification of the developed photovoltaic voltage. This modulated current develops a signal across load connected between the emitter and collector electrodes. The general principles of permeable base transistors are known and are discussed, for example, in paper entitled "Recent Experimental Results on Permeable Base Transistors" by G. D. Alley, C. 0. Bozler, D. C. Flanders, R. A. Murphy, and W. T. Lindley, publishe in the International Electron Devices Meeting Technical Digest, Washington, D. C, December 8-10, 1980, pp. 608- 612. In such known transistors, an externally derived signal voltage is applied to the permeable grid to modula the transistor emitter to collector current. As is described in the paper, for efficient operation it is important that the permeable grid not introduce significa defects in the crystal structure of the semiconductive body.

For minimal disturbance of the crystal structur of the silicon body, the silicide layer is preferrably - formed as an epitaxial growth on a silicon crystal substrate, followed in turn by an epitaxial growth of a silicon layer over the silicide layer. Techniques for growing palladium silicide (Pd 2 Si) epitaxially on a silic crystal are described in a paper entitled "Surface Structure of Epitaxial Pd 2 Si Thin Films" by K. Oura, S. Okada, Y. Kishikawa, and T. Hanawa, published in Appli

- 4 -

Phys. Letters, Vol. 40(2), 15, January 1982, pp. 138-140, and techniques for growing nickel silicide (NiSi2) and platinum silicide (PtSi) on silicon substrates are described by H. Ishiwara, in the Proceedings of the 5 Symposium on Thin Film Interfaces and Interactions, edited by J. E. E. Baglin and J. M. Poate (Electrochemical Society, N.Y. 1980), p. 159. Typically these techniques involve use of molecular beam epitaxy.

For the fabrication of the device shown herein, 0 monocrystalline silicon substrate of relatively high purit is used and molecular beam epitaxy in a stoichiometric codeposition is used to form the desired silicide layer directly on the heated silicon substrate. After growth of a layer of desired thickness, typically between 500 to 100 5 Angstroms thick, fine line or X-ray photolithography is used to pattern the layer in the desired grid pattern. Typically, a * series of stripes about 1000 Angstroms wide with about 1 1000 Angstroms spacing is formed in a portion o the layer to serve as the permeable grid, each stripe 0 remaining attached at its two ends to the continuous portion of the layer for providing electrical connection t the individual stripe. Then after cleaning and appropriate annealing to improve the crystal structure of the silicide, molecular beam epitaxy is used to grow a 5 relatively high purity silicon layer epitaxially over the silicide to complete the silicon body structure shown. / . Conventional techniques are used to form the electrode contacts and to create the more heavily doped emitter and collector portions of the silicon body. Typically, the 0 initial silicon substrate is n-type with an excess donor concentration of about IxlO ** - 5 ions/cm * - * and the surface regions of the emitter and collector regions are implanted to have excess donor concentration of at least IxlO * -- 8 ions/cm 3 . It is usually preferable to have a higher dopin 5 in the emitter region in order to lower series resistance. A low collector doping reduces collector base capacitance desirably for better high frequency response.

___

In FIG. 2, there is shown an embodiment which i designed for applications where avalanche multiplication not desired. Additionally, this embodiment is designed f the light being detected to be incident on the emitter surface rather than the collector surface. It comprises silicon crystal 20 whose bulk is lightly-doped n-type and which includes a silicide layer 21 which includes a permeable grid portion which divides the crystal into an emitter portion 22 and a collector portion 23. An electrode 24 makes electrical connection to the emitter portion, an electrode 25 makes electrical connection to t collector portion, and an electrode 26 makes electrical connection to the silicide layer. An oxide layer 27 cove exposed portions of the crystal. Only the surface region of the emitter region is implanted to increase locally it donor doping to decrease the series resistance.

Operation of this- embodiment is similar to that of the FIG. 1 embodiment. However, because operation is not dependent on avalanche multiplication, the electric field in the region of the grid can be less and so the d- bias voltage maintained between the emitter and collector contacts can be lower.

In FIG. 3, there is shown an embodiment in whic the photogeneration of carriers occurs in a region of the crystal 30 distinct from that where transistor action or amplification occurs. To this end, the crystal includes o the left side, as seen in the drawing, a separate photodiode detector and on the right side a separate permeable base transistor.- The photodiode comprises essentially the continuous portion of the silicide layer 3 embedded in the silicon crystal. The silicide layer also includes a grid portion which divides the crystal into an emitter portion 32 and a collector portion 33. The emitte portion is provided with an electrode 34 and the collector portion with electrode 35. The silicide layer is provided with an electrode 36 which is maintained at a negative bias. Essentially, the photodiode stage comprises the

OM

continuous silicide layer portion and the overlying silico which is an extension of the emitter portion of the silico crystal, and the photovoltaic voltage developed in the photodiode stage between the emitter and the silicide laye by the incident light is impressed on the permeable base o the transistor stage where it serves to modulate the current flow through a load connected between the emitter and collector electrodes.

As shown in this embodiment, it is desirable to remove some of the silicon material underlying the continuous silicide layer portion to provide an opening fo input light waves through the aluminum collector- contact 35.

In the embodiment shown in FIG. 4, the photodiod is integrated with an insulated gate field-effect transistor in which the photovoltaic voltage developed on the silicide layer is used as the gate voltage to control the conductivity of a channel in the transistor.

To this end, the silicon crystal 40 includes on the left a photodiode section and on the right a field- effect transistor section.

The photodiode section includes a heavily doped n-type substrate portion 41 over which lies an epitaxial lightly doped n-type layer 42 over which lies the silicid layer 43, the layer 43 forming a Schottky-barrier junctio with the layer 42.

The field-effect transistor portion on the righ side includes a heavily doped n-type substrate portion 44 over which lies an epitaxial layer 45, both of which are r extensions, respectively, of the substrate portion 41 and epitaxial layer 42 of the photodiode section. In the epitaxial layer 45 are spaced a p-type source 46 and a p- type drain 47. Source and drain electrodes 48 and 49 are provided for these regions. The intermediate lightly dop n-type region in which is formed the channel is provided with a gate insulator layer 50, typically about 500 Angstroms thick of thermally grown silicon oxide. Ov

O

this gate insulator extends the gate electrode 51. These form a typical p-type channel enhancement mode transistor

The gate electrode 51 is extended over a thick insulating layer to couple to an extension of the silicid layer 43 of the photodiode so that the photovoltaic signa voltages developed on the silicide layer are transmitted the gate electrode. While, in some instances, this can b a direct coupling, in which case the gate electrode is a continuous extension of the silicide layer, in most instances it is preferable to bias the gate electrode to d-c voltage different from that to which the silicide electrode of the photodiode is biased, in which case the coupling between the gate electrode and the silicide laye is a-c or capacitive as shown in FIG. 4. In operation, typically the n-type silicon substrate 41,44 is maintained at ground, the silicide lay 43 is maintained at a negative potential with respect to the substrate to bias the Schottky-barrier junction of th photodiode in reverse, the source 46 of the field-effect transistor is maintained at ground, and the drain 47 is maintained at a negative potential. Light of appropriate wavelength for absorption in the silicide incident on the photodiode creates a positive potential on the silicide layer which is transmitted to the gate electrode to modulate the p-type inversion layer in the channel and permit current conduction between the source and drain regions and through an external load connected between th source and drain electrodes.

Different types of field-effect transistors can be substituted for the transistor section in the embodime shown in FIG. 4, and an electrode coupled to the silicide layer, either directly or capacitively, used as its contro element whereby the relatively small photovoltaic signal derived by the photodiode stage is amplified. In particular, both enhancement and depletion mode transistor are feasible for this purpose, including forms in which th control element makes a Schottky-barrier connection to the

silicon body for controlling conduction thereunder.

Other conductive materials having the requisite properties for use as the permeable base can be used. In particular, such materials should have the property that they can be incorporated into the semiconductive crystal without disturbing the crystal lattice so badly that transistor action is no longer feasible and that they for a Schottky-barrier junction with the semiconductive crysta that is photovoltaic in response to incident radiation of the wavelength to be detected.