Title:
POWER AMPLIFICATION CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2022/172868
Kind Code:
A1
Abstract:
Provided is a power amplification circuit for performing power amplification appropriately in accordance with the state of an input signal. A power amplification circuit (10) comprises: a divider (101) which includes a variable inductance element and a variable capacitance element, and divides a signal RF1 into a signal RF2 having a first power level and a signal RF3 having a second power level in accordance with an inductance value of the variable inductance element and a capacitance value of the variable capacitance element; a carrier amplifier (102) connected to the divider (101) to amplify the signal RF2 and to output a signal RF4; a peak amplifier (103) connected to the divider (101) to output a signal RF5 when the second power level is greater than or equal to a predetermined power level; and a synthesizer (104) for synthesizing the signal RF4 and the signal RF5.
Inventors:
OSHIMA TAKESHI (JP)
UEDA KAZUHIRO (JP)
UEDA KAZUHIRO (JP)
Application Number:
PCT/JP2022/004423
Publication Date:
August 18, 2022
Filing Date:
February 04, 2022
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H03F1/02; H03F3/213
Domestic Patent References:
| WO2019021426A1 | 2019-01-31 |
Foreign References:
| EP2876810A1 | 2015-05-27 | |||
| JP2006339981A | 2006-12-14 |
Attorney, Agent or Firm:
INABA, Yoshiyuki et al. (JP)
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