Title:
POWER SUPPLY PROTECTION CIRCUIT AND MOTOR DRIVE DEVICE PROVIDED WITH SAME
Document Type and Number:
WIPO Patent Application WO/2010/150488
Kind Code:
A1
Abstract:
Disclosed is a power supply protection circuit which is provided with: a current suppressing resistor (Rp) provided between an input terminal (VI) and an output terminal (VO); a transistor (Q1) wherein the source and the drain are connected in parallel to the current suppressing resistor (Rp) as a current suppressing section; and a switch control circuit (20), which applies the voltage of an ground terminal (GND) to the gate (G) of the transistor (Q1) when the voltage of the output terminal (VO) exceeds a predetermined voltage, and applies the voltage of the input terminal (VI) to the gate (G) of the transistor (Q1) when the voltage of the output terminal (VO) is lower than the predetermined voltage. The transistor (Q1) can be turned on and off only by means of simple control by having a P-channel transistor as the transistor (Q1).
Inventors:
ISODA MINEAKI
KAMOGI YUTAKA
KISHIMOTO KENICHI
KAMOGI YUTAKA
KISHIMOTO KENICHI
Application Number:
PCT/JP2010/003992
Publication Date:
December 29, 2010
Filing Date:
June 16, 2010
Export Citation:
Assignee:
PANASONIC CORP (JP)
ISODA MINEAKI
KAMOGI YUTAKA
KISHIMOTO KENICHI
ISODA MINEAKI
KAMOGI YUTAKA
KISHIMOTO KENICHI
International Classes:
H02H9/02; H02J1/00; H02M3/00
Foreign References:
| JPH08272464A | 1996-10-18 | |||
| JP2000209777A | 2000-07-28 | |||
| JP2005253195A | 2005-09-15 | |||
| JP2003189464A | 2003-07-04 | |||
| JP2008022597A | 2008-01-31 |
Attorney, Agent or Firm:
NAITO, Hiroki et al. (JP)
Hiroki Naito (JP)
Hiroki Naito (JP)
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