PREPARATION METHOD FOR COLUMNAR CAPACITOR ARRAY STRUCTURE, AND SEMICONDUCTOR STRUCTURE

WIPO Patent Application WO/2023/024429

A1

The present application provides a preparation method for a columnar capacitor array structure, and a semiconductor structure. According to the preparation method, before a mask layer is removed, the thickness of a mask layer in a peripheral area and the thickness of a mask layer in an array area are adjusted to be the same by using filling of a photoresist layer, so that the loss of a top supporting layer caused by the impact of different thicknesses of the mask layer on the thickness of the top supporting layer is avoided. In addition, according to the preparation method in the present application, a third sacrificial layer and an auxiliary layer are also formed, so as to perform dual protection on the top supporting layer to prevent the top supporting layer from being thinned in a subsequent process, so as to increase the supporting strength of the top supporting layer, thereby further avoiding the occurrence of tilting of the columnar capacitor due to insufficient supporting strength of the top supporting layer.

JPH04276380	SEMICONDUCTOR MEMORY DEVICE
JPH11251456	SEMICONDUCTOR MEMORY CELL
JPH0312929	MANUFACTURE OF SEMICONDUCTOR

WAN QIANG (CN)
ZHAN KANGSHU (CN)
XIA JUN (CN)

PCT/CN2022/072659

March 02, 2023

January 19, 2022

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CHANGXIN MEMORY TECH INC (CN)

H01L21/8242; H01L27/108

US20170077102A1	2017-03-16
CN110010604A	2019-07-12
CN103681676A	2014-03-26
KR20120050327A	2012-05-18
CN111725139A	2020-09-29
US20210151439A1	2021-05-20

SHANGHAI WINSUN INTELLECTUAL PROPERTY AGENCY (CN)

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