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Title:
REAL TIME PHASE ERROR DETECTION IN QUADRATURE DEMODULATORS
Document Type and Number:
WIPO Patent Application WO/2024/042780
Kind Code:
A1
Abstract:
An apparatus for detecting a Q-demodulator's real-time phase and offset error includes an RF signal path configured to receive an RF signal from an RF component, a first chopper to chop the RF signal at a first frequency to generate a chopped RF signal, an LO signal path configured to receive an LO signal, a second chopper to chop the LO signal at a second frequency to generate a chopped LO signal, a summing mechanism to combine the chopped LO signal to the chopped RF signal into a combination signal. The apparatus further includes a Q-demodulator comprising a phase shifter configured to shift a phase of the combination signal and a phase of the LO signal, and a mixer configured to multiply the shifted combination signal by the shifted LO signal to generate a baseband signal, and at least two filters configured to extract different signals contained in the baseband signal for analysis.

Inventors:
MAYMANDI NEJAD MOHAMMAD
LIPKA RONALD J
Application Number:
PCT/JP2023/016230
Publication Date:
February 29, 2024
Filing Date:
April 25, 2023
Export Citation:
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Assignee:
PANASONIC IP MAN CO LTD (JP)
International Classes:
H03D7/00
Foreign References:
JP2014165921A2014-09-08
JP2004518366A2004-06-17
Other References:
P. GODOY ; J.L. DAWSON: "Chopper Stabilization of Analog Multipliers, Variable Gain Amplifiers, and Mixers", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE, USA, vol. 43, no. 10, 1 October 2008 (2008-10-01), USA, pages 2311 - 2321, XP011235955, ISSN: 0018-9200, DOI: 10.1109/JSSC.2008.2004328
Attorney, Agent or Firm:
KAMATA Kenji et al. (JP)
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