RECONFIGURABLE CIRCUIT

Title:

RECONFIGURABLE CIRCUIT

Document Type and Number:

WIPO Patent Application WO/2017/064744

Kind Code:

A1

Abstract:

A reconfigurable circuit includes first and second wires and two or more paths active at different times. Each path includes: a first NVRS whose first terminal is connected to the first wire; a first transistor whose drain terminal is connected to a second terminal of the first NVRS; a second NVRS whose first terminal is connected to the second terminal of the first NVRS; a second transistor whose source terminal is connected to a second terminal of the second NVRS and whose drain terminal is connected to the second wire; and a 2-input AND circuit whose output is connected to a gate terminal of the first transistor. A time control signal is supplied to a first input of the 2-input AND circuit and a gate terminal of the second transistor. A write control signal is supplied to a second input of the 2-input AND circuit.

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Inventors:

BAI XU (JP)
SAKAMOTO TOSHITSUGU (JP)
TADA MUNEHIRO (JP)
TSUJI YUKIHIDE (JP)
TADA AYUKA (JP)
MIYAMURA MAKOTO (JP)
NEBASHI RYUSUKE (JP)

Application Number:

PCT/JP2015/005239

Publication Date:

April 20, 2017

Filing Date:

October 16, 2015

Export Citation:

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Assignee:

NEC CORP (JP)

International Classes:

H03K19/173; H01L27/105

Foreign References:

US20150214950A1	2015-07-30
US20110007554A1	2011-01-13
US20070210826A1	2007-09-13