Title:
SEMICONDUCTOR CHIP AND METHOD FOR MANUFACTURING THE SAME
Document Type and Number:
WIPO Patent Application WO/1997/047029
Kind Code:
A1
Abstract:
A semiconductor chip which is hardly damaged when the chip is cut off from a semiconductor wafer and a method for manufacturing the chip. A cutting groove (26) having a width larger than that of a scribed line (cutting line) (24) drawn with a dicing saw is formed in the upper portion of the cutting part of a semiconductor wafer (20). Namely, on the side face (28) of a cut off die (22), the side wall (32) of the groove (26) is recessed from a cutting plane (30). Therefore, when the wafer (20) is cut along the center of the groove (26) with a dicing saw (not shown in the figure), the possibility of the dicing saw coming into contact with the side wall (32) is extremely low. Therefore, the upper surface of the die (22) can be prevented from being damaged by the advancing edge of the dicing saw.
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Inventors:
KITAGURO KOICHI (JP)
KADONISHI HIROSHI (JP)
KADONISHI HIROSHI (JP)
Application Number:
PCT/JP1997/001935
Publication Date:
December 11, 1997
Filing Date:
June 06, 1997
Export Citation:
Assignee:
ROHM CO LTD (JP)
KITAGURO KOICHI (JP)
KADONISHI HIROSHI (JP)
KITAGURO KOICHI (JP)
KADONISHI HIROSHI (JP)
International Classes:
H01L21/02; H01L21/301; H01L21/304; H01L21/78; (IPC1-7): H01L21/301
Foreign References:
| JPS6226839A | 1987-02-04 | |||
| JPS6214440A | 1987-01-23 | |||
| JPS56103447A | 1981-08-18 | |||
| JPH05136261A | 1993-06-01 | |||
| JPS6418733U | 1989-01-30 | |||
| JPS62186569A | 1987-08-14 | |||
| JPH08293476A | 1996-11-05 |
Other References:
See also references of EP 0844648A4
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