Title:
SEMICONDUCTOR COMPOSITE DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR COMPOSITE DEVICE
Document Type and Number:
WIPO Patent Application WO/2022/050167
Kind Code:
A1
Abstract:
A semiconductor composite device 1 includes an active element 10 and a passive element 20 that are disposed so as to correspond to a plurality of channels and that form a voltage regulator; a load 30 to which DC voltage regulated by the voltage regulator is supplied; and a wiring substrate 40 electrically connected to the active element 10, the passive element 20, and the load 30. A plurality of capacitors (for example, output capacitors C1 and C2) arranged in the channels include a capacitor array 50 that includes and is formed integrally with a plurality of planarly arranged capacitor parts. The capacitor array 50 includes a plurality of through-hole conductors TH1 and TH2 that penetrate the capacitor array 50 in a direction perpendicular to the mounting surface of the wiring substrate 40. When viewed from the mounting surface of the wiring substrate 40, at least a portion of the capacitor array 50 is arranged at a position overlapping the load 30.
Inventors:
KITAMURA TATSUYA (JP)
HIMEDA KOSHI (JP)
FURUKAWA TAKESHI (JP)
HIMEDA KOSHI (JP)
FURUKAWA TAKESHI (JP)
Application Number:
PCT/JP2021/031336
Publication Date:
March 10, 2022
Filing Date:
August 26, 2021
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01L23/12; H01L25/00; H02M3/155; H05K3/46
Domestic Patent References:
| WO2019130746A1 | 2019-07-04 |
Foreign References:
| US20190304915A1 | 2019-10-03 |
Attorney, Agent or Firm:
YASUTOMI & ASSOCIATES (JP)
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